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Imperas and Industry Articles

New packaging technology is spawning new markets for IP, but it is not clear how many interface standards will be created and need to be supported.

Semiconductor Engineering

 

The design IP market has long been known for constant change and evolution, but the industry trend toward heterogenous integration and chiplets is creating some new challenges and opportunities. Companies wanting to stake out a claim in this area have to be nimble…

eeNews Europe

Imperas Software in the UK has extended the RVVI (RISC-V Verification Interface) with virtual peripherals to support asynchronous events and system level interrupts. RVVI is an open specification with a common methodology for the key components of the testbench to connect the RISC-V processor RTL instruction trace and reference models to fully support the lock-step-compare co-simulation.

The RVVI…

The latest posts on the EDA, IP and SoC Industries

 

EDACafe

 

The Design Automation Conference is back to its usual summer timeframe – again at the Moscone Center in San Francisco – with over one hundred exhibitors and a rich conference program that covers a wide range of topics including artificial intelligence, autonomous systems, RISC-V, security, embedded systems and more. Here we will briefly…

EENews Europe

It may come as a surprise that over 10 billion RISC-V processor cores have shipped. After all, it took ARM 17 years to reach that milestone in 2008, and RISC-V could be considered to be in its infancy with a consensus that the eco-system still needs to evolve, particularly around security. These two factors result from the open standard approach to an inherently custom technology. The instruction set can be easily extended to accelerate key instructions, reducing die area and…

Heterogeneous designs and AI/ML processing expose the limitations of existing methodologies and tools.

Semiconductor Engineering

 

Defining what a processor is, and what it is supposed to do, is not always as easy as it sounds. In fact, companies are struggling with the implications of hundreds of heterogenous processing elements crammed into a single chip or package. Companies have extensive verification methodologies, but not for validation. Verification is a…

The RISC-V Pavilion at Embedded World 2022 highlighted a range of advancements, from the first RISC-V–based GPU to a new open-source RISC-V development kit.

Electronic Products

 

Embedded World 2022 was the place to be for the latest RISC-V developments. Innovations ranged from Think Silicon’s first RISC-V–based GPU, targeting 32-bit SoCs, to the OpenHW Group’s new open-source RISC-V development kit, based on the OpenHW CORE-V…

It may not be the most glamorous type of software development, but getting it right is essential for the success of any hardware platform.

Semiconductor Engineering

 

Hardware and software are two sides of the same coin, but they often live in different worlds. In the past, hardware and software rarely were designed together, and many companies and products failed because the total solution was unable to deliver.
The big question is…

Challenges are changing for engineering teams, and they are crossing traditional boundaries.

Semiconductor Engineering

 

Chip reliability is coming under much tighter scrutiny as IC-driven systems take on increasingly critical and complex roles. So whether it’s a stray alpha particle that flips a memory bit, or some long-dormant software bugs or latent hardware defects that suddenly cause problems, it’s now up to the chip industry to prevent these problems in the first place, and…

Efficient Trace, Supervisor Binary Interface, Unified Extensible Firmware Interface, and Zmmul Multiply-Only Extension Accelerate Embedded- and Large-System Design.

RISC-V International

 

Nuremberg, Germany – June 21, 2022 – RISC-V International, the global open-design standards pioneer, announced its first four specification and extension approvals of 2022 – Efficient…