The challenges in designing a modern System-on-Chip (SoC) have stretched both Electronic Design Automation (EDA) tools, as well as traditional Embedded Software methodologies, to breaking point. A new generation of technologies is necessary to address development issues beyond the RTL and C code design levels, targeting “Electronic System Level,” or ESL. Imperas has pioneered new solutions that target this challenge.
Design architectures are changing. With the increase in integrated circuit fabrication costs and complexities, a movement towards standardized platforms, with greater levels of specific functionality coded in software, is apparent. To maintain the growth in performance required for these modern, software focused electronic systems, the use of multi-core processors has become prevalent.
Increased software functionality coupled with multi-core processor concurrency, has increased the complexity and scale of embedded software in typical development projects. The software component of these projects already represents their largest cost center, and the increase in concurrency sends design productivity barriers spiraling out of control.
To effectively develop software for multi-core devices, new development technologies, methodologies and tools are required. The mission of Imperas is to leverage up and coming Virtual Platform techniques to build a revolutionary new solution for multi-core embedded software development. The solution provides the productivity necessary to accelerate engineering schedules, while increasing code quality, in the light of multi-core complexity.
Imperas Software, Ltd is a team of leading simulation and tool technologists combined with embedded software applications professionals. By bringing together EDA and embedded software expertise, the team has produced a solution that leverages the best of both, enabling unique capability for software design.
A Virtual Platform is a software representation of a processor-based system, which includes Instruction Accurate (IA) processor models coupled with whatever peripheral, memory and sub-system models are required to execute embedded software for the purposes of rigorous functional verification.
The key to this new solution is to ensure that the Virtual Platform executes code as efficiently and quickly as possible, and it is this in which Imperas excels. This requires ultra-fast software simulation models of processors, peripherals and behavioral components which, when simulated together, can execute embedded software up to a Billion Instructions per Second. Often for embedded devices Imperas technology can execute software running faster than real time.
Imperas combines high-performance simulation with powerful tooling that ensures any code problems can be detected and repaired efficiently, while streamlining code execution.The system includes technology for bug discovery that can trap an issue with code running across many processor cores in a variety of operational scenarios. This ensures a final product of the highest quality, operating with bug free execution.
As part of its solution, Imperas founded Open Virtual Platforms (OVP), an industry consortium dedicated to opening models and infrastructure to create Virtual Platforms as easily as possible. Much of the Imperas simulation technology is now available as part of the OVP initiative, at www.ovpworld.org.
At Imperas we are dedicated to make multi-core software development easy and efficient.
If you are facing the challenges of getting software to run on complex multi-core platforms – then contact us at email@example.com