Dr. Luca Benini, chair of digital circuits and systems and one of the originators of the RISC-V PULP project
ETH Zurich
RISC-V has made the successful transition from an academic project to achieve commercial adoption. We see a universal need for quality and design assurance that can be supported by riscvOVPsim across all projects as PULP RI5CY cores are increasingly implemented in commercial SoC development.
Gunar Schirner
Associate Professor, Northeastern University, Boston, USA
I find Imperas tools and models invaluable for my research and my course, High Level Design of Hardware Software Systems. My students can now explore and command state-of-the-art prototyping technology for complex systems.