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Imperas and Industry Articles

Imperas examples of RISC-V Custom Instructions featuring the ChaCha20 stream cipher are used to illustrate the flexibility of the open standard ISA of RISC-V.

Elektor Magazine

 

The electronics industry seems to have gone crazy for RISC-V. But why? What is RISC-V and how can you participate in it? If you’ve read anything in passing, you’ll know it is a type of processor, and there are some chips available that use it. You may also know that it is "free and open," which primarily accounts for the excitement and huge fanbase. Let’s…

What does open-source verification mean in the context of a RISC-V processor core? Does it provide free tools, free testbenches, or the freedom to innovate?

Semiconductor Engineering

 

Experts at the Table: Semiconductor Engineering sat down to discuss what open source verification means today and what it should evolve into, with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon…

How RISC-V verification ecosystems support flexibility in approaching a custom processor design.

Semiconductor Engineering

 

This article is derived from a talk at the RISC-V Summit in December 2020 that Bill McSpadden, principal verification engineer at Seagate Technology, gave on the challenges and experiences his team faced in the verification of two custom RISC-V processor cores. While a technical presentation at a technical conference may not be completely unexpected, the unique part was the…

The DVCon 2021 edition of Siemens EDA Verification Horizons.

Verification Horizons

 

The open standard ISA of RISC-V allows SoC developers to also build or modify a processor core optimized to the application requirements. The SoC verification tasks are adapting to address the significant increases in complexity. This article covers the 6 key components of RISC-V processor verification: The DV Plan, RTL DUT, Testbench,…

The actual time may be more of a fuzzy risk assessment than a clear demarcation.

Semiconductor Engineering

 

Even with the billions of dollars spent on R&D for EDA tools, and tens of billions more on verification labor, only 30% to 50% of ASIC designs are first time right, according to Wilson Research Group and Siemens EDA.
Even then, these designs still have bugs. They’re just not catastrophic enough to cause a re-spin. This means more efficient verification is needed. Until then, verification teams continue to…

OpenHW Processor DV Flow with Imperas RISC-V Golden Reference Model

 

The RISC-V ISA (Instruction Set Architecture) permits a range of possibilities for processor implementation with a modular approach for standard and custom extensions. In addition, implementations may be shared commercially or as open-source, and adopters beyond the original design team can use these directly or as a basis for further modifications and enhancements.
The OpenHW Group is a not-for-…

High-quality and efficient verification requires a focus on details.

Semiconductor Engineering

 

Verification is undergoing fundamental change as chips become increasingly complex, heterogeneous, and integrated into larger systems.

Tools, methodologies, and the mindset of verification engineers themselves are all shifting to adapt to these new designs, although with so many moving pieces this isn’t always so easy to comprehend. Ferreting out bugs in a design now requires a multi-faceted and more holistic approach,…

Using SoC methodologies for RISC-V processor DV.

Semiconductor Engineering

 

As we celebrate over 50 years of microprocessors, the industry has embraced every generation of silicon process technology with architectural innovation plus new design methods that have supported innovations in almost every market segment. The interest around RISC-V is opening up increased activity around new approaches to optimize designs for the next generation of devices across multiple market segments…

 

To read the full…

The semiconductor industry will look and behave differently this year, and not just because of the pandemic.

Semiconductor Engineering

 

The new year will be one of significant transition and innovation for the chip industry, but there are so many new applications and market segments that broad generalizations are becoming less meaningful. Unlike in years past, where sales of computers or smart phones were a good indication of how the chip industry would fare, end markets have both multiplied and splintered, greatly increasing the number…