Virtual Platform Standards
Silicon and IP Providers
Andes Technology Corporation is a founding premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and the cumulative volume has reached 7 billion.
The OVP models of the Andes cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-andes.
The Arm architecture is a family of reduced instruction set computing (RISC) architectures for computer processors. It is the most pervasive processor architecture in the world, with billions of Arm-based devices shipped every year, from sensors, wearables and smartphones to supercomputers.
Arm CPU processors offer the widest range of processor cores to address the performance, power and cost requirements for almost all application markets. Including the industry leading Cortex-A series, the ultra-low power Cortex-M series, real-time Cortex-R series, server ready Neoverse series, SecurCore series and Machine Learning solutions.
The OVP models of the Arm cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-arm.
Cadence's Tensilica is the leader in customizable dataplane processors IP cores. Dataplane Processor Units (DPUs) combine the best capabilities of CPUs and DSPs while delivering 10- to 100-times the performance because they can be customized using Tensilica's automated design tools to meet specific signal processing performance targets.
The OVP models of the Tensilica cores and platforms are available to download from OVPworld at www.OVPworld.org/silicon-ip-providers-cadence-tensilica.
Codasip delivers leading-edge RISC-V processor IP and high-level processor design tools, providing IC designers with all the advantages of the RISC-V open ISA, along with the unique ability to customize the processor IP. As a founding member of RISC-V International and a long-term supplier of LLVM and GNU-based processor solutions, Codasip is committed to open standards for embedded and application processors. Formed in 2014 and headquartered in Munich, Germany, Codasip currently has R&D centers in Europe and sales representatives worldwide.
Codasip has adopted Imperas reference designs and the Imperas DV solution for Codasip IP. Codasip has invested heavily into processor verification to deliver the industry’s highest quality RISC-V processors. Codasip has included Imperas golden reference models in its DV testbenches to ensure an efficient verification flow that accommodates a wide range of flexible features and options while scaling across the entire roadmap of future cores to enable rigorous confirmation of functional quality.
The OVP models of the Codasip cores and platforms are available to download from OVPworld at www.OVPworld.org/silicon-ip-providers-codasip.
Imagination is a UK-based company that creates silicon and software IP (intellectual property) designed to give its customers an edge in competitive global technology markets. Its GPU, CPU, and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market, and lower total cost of ownership. Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces.
IMG RTXM-2200 is the first core from Imagination’s RISC-V Catapult range. The Imperas reference model for IMG RTXM-2200 is available on request to lead customers for real-time embedded applications in next generation domain-specific SoCs as a reference for software development in virtual platforms as well as supported EDA environments.
The full announcement is available at https://www.imperas.com/articles/imperas-and-imagination-collaborate-pr…
lowRISC is a not-for-profit company using collaborative engineering to develop and maintain open source silicon designs and tools, through a unique combination of skills, expertise and vision.
Ibex (formerly known as zero-riscy) is a small 32 bit RISC-V core. With its two-stage pipeline and support for the RV32IMC instruction set Ibex is ideally suited as control core in many embedded scenarios. Ibex is a high-quality core: together with the RTL, lowRISC provides full UVM-based verification, extensive documentation and all the tools to successfully integrate Ibex into designs.
The OVP models of the LowRISC processor cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-lowrisc.
Microsemi Corporation, a wholly owned subsidiary of Microchip Technology Inc. (Nasdaq: MCHP), offers a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets.
Microsemi offers a comprehensive suite of software tool chains and IP cores for FPGA designs. The company's Mi-V RV32 RISC-V cores are available for Microsemi's PolarFire, RTG4, and IGLOO2 FPGAs.
The OVP models of the Microsemi Mi-V RISC-V cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-microsemi.
MIPS is a leading provider of intellectual property (IP) processor architectures and cores. Originally founded in 1984 as MIPS Computer Systems Inc. by researchers from Stanford University, today MIPS designs have shipped in billions of units across the globe and have even reached the outer edges of our solar system. MIPS is broadly used in products such as consumer entertainment, home networking and infrastructure equipment, LTE modems and embedded applications. MIPS is also at the heart of a growing number of Internet of Things (IoT) devices, advanced driver assistance systems (ADAS) and emerging intelligent applications including autonomous vehicles.
The OVP models of the MIPS cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-mips.
NSITEXE, Inc., a group company of the DENSO Corporation, is an IP vendor that develops advanced processors, including RISC-V based processor IP for functional safety. NSITEXE provides Akaria processors that support a wide range of embedded systems to address this challenge. Akaria processors combine RISC-V-based Standard Processors with Extension Unit components to provide the optimal Domain Specific Accelerator for each customer application. The Akaria processors include the NS family as Standard Processors and the DR family as Domain Specific Accelerators.
NSITEXE has selected ImperasDV for advanced RISC-V processor hardware design verification. This expands and extends the use of Imperas simulation technology, models, verification IP and tools by NSITEXE for the next generation of 64bit RISC-V based designs featuring vector accelerators for AI (Artificial Intelligence) automotive applications with verification leading to the level required to achieve ISO 26262 ASIL D.
OpenHW Group is a not-for-profit, global organization driven by its members and individual contributors where hardware and software designers collaborate in the development of open-source cores, related IP, tools and software. OpenHW Group provides an infrastructure for hosting high quality open-source HW developments in line with industry best practices.
There are a range of cores, known as CORE-V with the initial one being the 32-bit CV32E40P originally known as the PULP RI5CY core (from ETH Zurich university). The CORE-V CV32E40P is a 32bit, 4-stage core that implements the RISC-V specifications for RV32IMCZifencei. The CV32E40P has been extensively verified against the Imperas OVP golden reference model of RISC-V as part of the CORE-V Verif project.
The OVP models of the CORE-V cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-openhwgroup.
For software development a Free ISS is also available, riscvOVPsimCOREV can be downloaded from https://github.com/openhwgroup/riscv-ovpsim-corev.
The Power ISA is an instruction set architecture (ISA) currently developed by the OpenPOWER Foundation, led by IBM. It was originally developed by IBM and then Power.org industry group. Power ISA is an evolution of the PowerPC ISA, created by the mergers of the core PowerPC ISA and the optional Book E for embedded applications. The merger of these two components in 2006 was led by Power.org founders IBM and Freescale Semiconductor. The ISA is divided into several categories and every component is defined as a part of a category; each category resides within a certain Book. Processors implement a set of these categories. Different classes of processors are required to implement certain categories, for example a server class processor includes the categories Base, Server, Floating-Point, 64-Bit, etc. All processors implement the Base category. Power ISA is a RISC load/store architecture.
The OVP models of the Power processor cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-power.
RISC-V is a free and open ISA (Instruction Set Architecture) enabling a new era of processor innovation through open standard collaboration. The RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. The RISC-V ISA is based on a modular structure with many standard extensions and configuration options, in addition to user defined custom instructions.
The OVP models of the reference standard specification RISC-V cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-risc-v.
The free enhanced RISC-V ISS, riscvOVPsimPlus package including many test suites and functional coverage analysis is available on OVPWorld at www.OVPworld.org/riscvOVPsimPlus.
Renesas Electronics Corporation delivers trusted embedded design innovation with complete semiconductor solutions that enable billions of connected, intelligent devices to enhance the way people work and live. A global leader in microcontrollers, analog, power, and SoC products, Renesas provides comprehensive solutions for a broad range of automotive, industrial, infrastructure, and IoT applications that help shape a limitless future.
The OVP models of the Renesas processor cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-renesas.
SiFive brings the power of the open-source RISC-V ISA that it invented combined with innovations in CPU IP to the semiconductor industry, making it possible to develop domain-specific silicon faster than ever before. SiFive and Imperas have a formal Collaboration Agreement, enabling Imperas to get early access to SiFive specifications for building models of SiFive processors and SiFive qualifying the Imperas models of the SiFive processor IP. More information about the Imperas models for SiFive processor IP can be found at www.imperas.com/sifive
Synopsys' DesignWare ARC Processor IP includes the DesignWare ARC EM, ARC 600 and ARC 700 families of 32-bit processor cores, as well as the DesignWare ARC Audio and ARC Video solutions. The ARC processor cores are highly configurable and enable SoC designers to implement a full range of embedded microprocessors optimized for their specific target application. The ARC Audio and ARC Video solutions include highly specialized cores combined with optimized codecs, offering the most complete audio and standard-definition video solutions for SoC designs available in the market.
The OVP models of the Arc cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-synopsys-arc.
Xilinx is the world’s leading provider of All Programmable FPGAs, SoCs and 3D ICs.
MicroBlaze is the industry-leader in FPGA-based soft processors, with advanced architecture options like AXI or PLB interface, Memory Management Unit (MMU), instruction and data-side cache, configurable pipeline depth, Floating-Point unit (FPU), and much more. MicroBlaze is a 32-bit RISC Harvard architecture soft processor core, a highly flexible architecture, plus a rich instruction set optimized for embedded applications.
The OVP models of the Xilinx MicroBlaze cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-xilinx-microblaze.
Operating Systems, Hypervisors and EDA Companies
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For seven years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For.
Founded in May of 1975, eSOL, Co.,Ltd. has 40 years of experience in meeting the demanding requirements of our markets. Capitalized at 1.04 billion yen, we are a premier Japanese independent vendor of products and services, focused on the Logistics, Embedded and Systems Engineering markets. As technologies grow increasingly complex, and as customers strive to speed up time-to-market, optimize return on investment and hit peak time-to-volume targets, eSOL's skills, experience and innovation continue to contribute to our customer's success.
eMCOS is the world’s first commercially available, ultra-scalable Real-Time Operating System using the distributed micro-kernel approach. eMCOS’s new OS architecture - unlike any existing RTOS architecture - enables scalability to support not only increasing core counts, but also heterogeneous hardware configurations, include different architectures such as on-chip flash microcontrollers, GPUs, and FPGAs. The platform is not only already ported to several hardware architectures, but can also be easily ported to new platforms with its highly-portable source code and design.
fentISS is a technological company that offers software solutions specifically designed for critical real-time embedded partitioned systems using virtualization techniques. This Spanish company provides software solutions which prevent mutual interference between critical embedded applications when running in a common hardware platform. fentISS virtualization solutions will be orbiting in more than 100 satellites by end of 2020.
Green Hills Software
Founded in 1982, Green Hills Software is the worldwide leader in embedded safety and security. In 2008, the Green Hills INTEGRITY-178 RTOS was the first and only operating system to be certified by NIAP (National Information Assurance Partnership comprised of NSA & NIST) to EAL 6+, High Robustness, the highest level of security ever achieved for any software product. Our open architecture integrated development solutions address deeply embedded, absolute security and high-reliability applications for the military/avionics, medical, industrial, automotive, networking, consumer and other markets that demand industry-certified solutions. Green Hills Software is headquartered in Santa Barbara, CA, with European headquarters in the United Kingdom.
Metrics Design Automation is a leader in providing EDA tools and workflows as a Service for FPGA and ASIC engineers. Headquartered in Ottawa, Canada, Metrics was founded in 2017 and is led by an experienced group of EDA and business executives. The company’s first product is a fully compliant SystemVerilog simulator implemented in the Google Cloud Platform. The company plans to be the first EDA company to offer a complete RTL-to-GDSII cloud-based design flow and tools on all the major cloud platforms.
Siemens EDA, a segment of Siemens Digital Industries Software, is a technology leader in software and hardware for electronic design automation (EDA). Siemens EDA offers proven software tools and industry-leading technology to address the challenges of design and system level scaling, delivering more predictable outcomes when transitioning to the next technology node. With a closed-loop digital twin managing the silicon lifecycle, data can move freely between design, manufacturing and the cloud for chips, boards and electrical and electronic systems. Our commitment to openness and industry alliances facilitates collaboration and interoperability across the EDA and electronics ecosystem -- Siemens is where EDA meets tomorrow.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As an S&P 500 company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and offers the industry's broadest portfolio of application security testing tools and services. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing more secure, high-quality code, Synopsys has the solutions needed to deliver innovative products.
WITTENSTEIN high integrity systems
WITTENSTEIN high integrity systems (WHIS) is part of The WITTENSTEIN Group.
The WITTENSTEIN Group was established in 1948 and has grown into a stable and mature global technology company with a focus on high end mechatronics systems. In 2014 the WITTENSTEIN Innovation Factory was officially opened, an 18,000 square meter investment in future growth housing mechatronic projects from concept to finished product.
With a presence in more than 40 countries, more than 2600 employees worldwide, and a turnover in 2017/18 of over 438 Million USD, WITTENSTEIN continues to flourish in highly demanding markets.
SAFERTOS® is a pre-certified safety Real Time Operating System (RTOS) for embedded processors. It delivers superior performance and pre-certified dependability, whilst utilizing minimal resources.
Service and Tool Providers
Breker Verification Systems
Breker Verification Systems is a leading provider of Portable Stimulus solutions, a standard means to specify verification intent and behaviors reusable across target platforms. It is the first company to introduce graph-based verification and the synthesis of powerful test sets from intent-based, abstract scenario models based on AI planning algorithms. Breker’s Test Suite Synthesis and TrekApp library allows the automated generation of high-coverage, powerful test cases for deployment into a variety of UVM, SoC and Post-Silicon verification environments. Case studies that feature Altera (now Intel), Analog Devices, Broadcom, IBM and other companies leveraging Breker’s solutions are available on the Breker website at https://brekersystems.com.
CircuitSutra is an emerging company focusing on SystemC modeling services to create virtual platforms of SoCs and to use OVP virtual platforms to provide embedded software services. Starting with the open framework of OVP, CircuitSutra has integrated SystemC / TLM2.0 models into OVP based virtual platforms, and added drivers for those peripherals that have been added to the virtual platform.
Coontec Co., Ltd. is a leading research and development company focused on embedded systems, embedded software, and virtualization technology. Coontec provides solutions and support to maximize embedded software development efficiency and quality, and to accelerate safety and security.
eSOL TRINITY Co., Ltd.
eSOL TRINITY Co., Ltd. (TRINITY) is a solutions provider for the design and development of embedded software. As a solutions provider, TRINITY provides services for its customers, distributes a range of tools for embedded software and also provides the technical support for the Imperas products in Japan. TRINITY’s engineering team has used OVP and Imperas tools for virtual platform model development and embedded software development, debug and test for over 5 years. TRINITY is also the developer of the OVP Fast Processor Model of the Renesas RL78 CPU.
Services provided by TRINITY include CPU and peripheral model development, platform development, OS/driver/firmware development, and integration of various tools into the embedded software development flow.
IAR Systems supplies future-proof software tools and services for embedded development, enabling companies worldwide to create the products of today and the innovations of tomorrow. Since 1983, IAR Systems’ solutions have ensured quality, reliability and efficiency in the development of over one million embedded applications. The company is headquartered in Uppsala, Sweden and has sales and support offices all over the world. Since 2018, Secure Thingz, the global domain expert in device security, embedded systems, and lifecycle management, is part of IAR Systems Group AB. IAR Systems Group AB is listed on NASDAQ OMX Stockholm, Mid Cap.
The Imperas ARM model AArch64 Armv8-A is the simulator technology for the development toolchain IAR Embedded Workbench for Arm. For embedded developers, the IAR Embedded Workbench with integrated Imperas simulator provides a rapid test and development environment to compile, debug and analyze code without the need for external hardware or boards. The Imperas models cover the envelope of the Arm V8-A Architecture and can be configured to represent any core or implementation.
The full announcement is available at www.imperas.com/articles/imperas-simulation-reference-models-selected-i…
Razorcat Development GmbH has been creating testing tools for software development of embedded systems since 1997. TESSY is Razorcat's powerful and certified unit and integration test tool for C/C++ embedded software. TESSY supports the most common microcontrollers, compilers and debuggers and is qualified for safety-related software development according to IEC 61508 and ISO 26262.
The Imperas processor models are now supported in the TESSY environment, the full announcement is available at https://www.imperas.com/articles/imperas-models-arm-processors-now-avai…
Posedge Software is a consulting company providing services in the areas of embedded software development and verification and hardware verification. Posedge also has significant experience integrating various tools to achieve a product flow for a specific task.
Posedge has used OVP and Imperas tools for virtual platform development, and integrated it with SystemC/TLM-2.0 environments, as well as using OVPsim and Imperas CpuManager with Cadence's Specman ISX verification product. Posedge presented a paper on this at the Virtual Platform Workshop and have additional information on OVPworld at www.OVPworld.org/service-providers-posedge-software.
Test and Verification Solutions (T&VS)
T&VS (Test and Verification Solutions Ltd) provides services and products to organisations developing complex products in the microelectronics and embedded systems industries. Such organisations use T&VS to verify their hardware and software products, employ industry best practice and manage peaks in development and testing programmes. T&VS’ embedded software testing services includes onsite/offshore testing support including assistance with safety certification and security testing.
Valtrix Systems was formed with a mission of creating world class tools and testing methodologies that will help companies efficiently verify the designs of IPs and SoCs. We enable our partners to verify their products faster and more cost-effectively.
STING, the flagship product of Valtrix, is a design verification platform for RISC-V based implementations. It can be configured to generate portable bare-metal programs containing self-checking architecturally-correct test stimulus, which can then be enabled on simulation, FPGA prototypes, emulation, or silicon. STING also provides a RISC-V architecture verification suite to provide users an easy ramp into verification readiness.
Valtrix STING is available now with the pre-integrated Imperas RISC-V reference model. The combined solution covers the full RISC-V specification for user, privilege, and debug modes, including all ratified standard extensions, and the near ratified (stable) specifications for Bit Manipulation, Crypto (Scala), DSP, Hypervisor, and Vectors. STING plus Imperas is also upgradable to add support for custom instructions and extensions. Lead customers are already engaged with designs featuring multithreading, multi-hart, and other complex microarchitectural features.
The full announcement is available at www.imperas.com/articles/imperas-expands-partnership-valtrix-address-gr….
University Program - Europe
Europractice Software Service
EUROPRACTICE membership is available to Academic Institutions or publicly funded Research Laboratories primarily engaged in University like activities from the European Union member States, European countries eligible to participate in Horizon 2020 and other countries with close links to Europe, ie in the Middle East, Africa, Russia and the former Soviet states, where special bilateral agreements apply.
Through Europractice, professors and researchers can access Imperas commercial tools for courses, as well as for research projects.
The CHIPS Alliance is an organization which develops and hosts high quality, open source hardware code (IP cores), interconnect IP (phy and logical protocols), and open source software development tools for design, verification, and more. We seek to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development.
The CHIPS Alliance leverages common hardware development efforts by developing IP blocks that can be broadly used, such as RISC-V cores and neural network accelerator cores. We recognize that verification contributions benefit all who participate in the project, and prioritize joint resources for design verification.
Founded in 2000, The Linux Foundation is supported by more than 1,000 members and is the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. The Linux Foundation’s projects are critical to the world’s infrastructure including Linux, Kubernetes, Node.js, and more. The Linux Foundation’s methodology focuses on leveraging best practices and addressing the needs of contributors, users and solution providers to create sustainable models for open collaboration.
Presentation videos and downloads are available that demonstrate OVP models and platforms running Linux and SMP Linux on OVPworld at www.ovpworld.org/operating-systems-support-linux.
OpenHW Group is a not-for-profit, global organization driven by its members and individual contributors where hardware and software designers collaborate in the development of open-source cores, related IP, tools and software. OpenHW provides an infrastructure for hosting high quality open-source HW developments in line with industry best practices.
CORE-V-Verif is the functional verification project for the CORE-V family of RISC-V cores with industrial grade pre-silicon verification based on UVM and SystemVerilog encapsulated Imperas RISC-V reference models, more details are available at https://github.com/openhwgroup/core-v-verif.
The OVP models of the CORE-V cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-openhwgroup.
For software development a Free ISS is also available, riscvOVPsimCOREV can be downloaded from https://github.com/openhwgroup/riscv-ovpsim-corev.
RISC-V International is a global nonprofit association based in Switzerland. Founded in 2015 as the RISC-V Foundation with 29 members, RISC-V is now a truly global organization with 1k+ members in more than 50 countries. RISC-V has broken down barriers in the semiconductor industry, bringing together different companies, industries, and geographies for open collaboration. RISC-V combines a modular technical approach with an open license business model, meaning that anyone, anywhere can leverage the IP contributed and produced by RISC-V International.
The OVP models of the RISC-V cores and platforms are available to download from OVPworld at www.ovpworld.org/ip-vendor-risc-v.
The free RISC-V ISS, riscvOVPsimPlus including many test suites and functional coverage analysis is available on OVPWorld at www.ovpworld.org/riscvOVPsimPlus.