
Revolutionizing Embedded Software Development
Using OVP Fast Processor Models with OVPsim and other simulators
Description of OVP Fast Processor Models and how to use them.
Also see the model variant specific documentation for very detailed information.

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There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.
On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.
Publicly available Imperas documents:
Comments
Professor Jong Tae Kim
Sungkyunkwan University, Seoul, South Korea - SKKUImperas OVP modeling and high-level simulation platforms unify both hardware and software development for multi-core designs, and are clearly the wave of the future. Access to the University Program allows my students access to advanced technologies essential to their future endeavors.
Premal Buch, VP Software
AlteraGiven the wide variety of customer applications for our SoC FPGAs, our software stacks require rigorous and comprehensive testing. Imperas' M*SDK has proven to be an outstanding environment for the validation and analysis of operating systems, drivers and firmware. Verification using the Imperas solution not only accelerates software bug discovery, but also provides a rapid understanding of the root cause of problems.