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Imperas at Electronica Embedded Forum, November 9-12 2020

Imperas with present a talk on SoC Architectural Exploration for AI and Machine Learning applications.

Electronica 2020


Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, today announced their participation at the Aspencore Embedded Forum during Electronica November 9-12, 2020.

Architectural Exploration for AI and Machine Learning – Migrating algorithms to dedicated accelerators in datacenters and edge applications

Abstract: A modem SoC project is a combination of hardware and processor resources with the software application that together provide an optimal solution for the targeted end market use case. The AI and Machine Learning algorithms have been developed and perfected in cloud-based platforms and training datasets based on significant real-world data. To further enhance the performance for applications in datacenter or edge devices the use of dedicated hardware can be explored to fine tune the optimum configuration of many core processors arrays. Evaluate heterogeneous designs with just the right fit of functions and performance across the design hierarchy, from the smallest minion node to main controller functions. Many processors offer configuration flexibility and support custom instructions. Custom instructions can help address the needs of the target applications by accelerating common routines or with dedicated core-to-core lightweight communication in many core arrays. This talk with cover the migration of cloud-based algorithms to dedicated hardware acceleration with the design flexibility RISC-V now offers system designs for SoC, FPGA and chiplet designs.


About Electronica virtual event for 2020

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About Imperas

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