DVCon is March 3-6 in San Jose, California. Imperas will be presenting a paper titled “Learning From Advanced Hardware Verification for Hardware Dependent Software” as part of Session 3, at 9:30am Tuesday March 4th. Here is the abstract:
We present a new perspective for embedded software verification for generalized multicore processor platforms, somewhat analogous to simulation-centric hardware verification solutions. A spatial, temporal, and abstract multi-dimensional framework for software verification, profiling, analysis, and debug is proposed that leverages a specialized simulation core. The simulator enables key services for the verification solution while providing a degree of separation from both the hardware models and software under test, to ensure accurate behavioral representation, as well as customization and performance advantages.
This paper will discuss requirements for modern embedded software development and solutions utilized to date, before discussing this simulation-based solution and the dimensional framework layered above. We will also discuss two real life scenarios where the solution is utilized to affect.