Imperas at DVCon 2019 - panel on verification and compliance in the era of open ISA’s – February 27 2019
Imperas is organizing a panel at 2019 Design and Verification Conference & Exhibition (DVCon), focused on the verification and compliance implications around the adoption of open ISA’s (Instruction Set Architecture) for the next generation of embedded processors. We hope to see you there!
Please email firstname.lastname@example.org to meet with Imperas on virtual platforms for embedded software and systems development, debug and test, at DVCon!
- Moderator: Kevin Krewell - TIRIAS Research
- Organizer: Larry Lapides - Imperas Software
- Emerson Hsiao - Andes Technology Corporation
- Adnan Hamid - Breker Verification Systems, Inc.
- Rob Shearer – Facebook, Inc.
- Simon Davidmann - Imperas Software Ltd.
- When: February 27, 8:30am – 9:30am
About DVCon 2019
Now in its 31st year, DVCon has established itself over the past three decades as the must-attend industry-focused conference for practicing design and verification engineers, EDA developers, and design managers. It is an opportunity to discuss challenges and solutions that can be beneficial in your current and upcoming projects, as electronic designs and verification complexities and challenges continue to grow at a rapid pace.
· Where: DoubleTree Hotel, San Jose, California, USA
· When: February 25-28, 2019.
For more information see https://dvcon.org