Skip to main content

Chips that pass in the night : How risky is RISC-V to Arm, Intel and the others? Very

Recent article in The Register on the impact of RISC-V, a decade on, expanding open ecosystem highlights limits of monolithic approach to CPU design

The Register


How well does Intel sleep? It's just rounded off a record year with a record quarter, turning silicon into greenbacks more efficiently than ever, redeeming recent wobbles in the data centre market and missteps in fabrication with double-digit growth.
The company should be slumbering with all the unworried ease of Scrooge McDuck on a mattress stuffed with thousand-dollar bills. Yet the wake-up packet of unease should be pinging its management port with some insistence right now …


To read the full article by Rupert Goodwins, click here, which highlights the Imperas RISC-V reference model and verification flow diagram as illustration of “the good news for the RISC-V ecosystem is that verification tools are appearing that automate the process as far as possible”.