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Revolutionizing Embedded Software Development

Imperas is now a part of Synopsys

Tradeoffs Between Edge Vs. Cloud

As localized processors become more powerful, what works best where?

Semiconductor Engineering

 

Increasing amounts of processing are being done on the edge, but how the balance will change between what’s computed in the cloud versus the edge remains unclear. The answer may depend as much on the value of data and other commercial reasons as on technical limitations.

The pendulum has been swinging between doing all processing in the cloud to doing increasing amounts of processing at the edge. There are good reasons for this. Processing locally reduces latency, increases reliability and security, and it helps to resolve data privacy concerns. And with increasingly powerful edge processor architectures, as well as a reduction in the resolution required for many applications, more computing at the edge is rapidly gaining traction.

But how far can this transition go? Do we really need the cloud anymore, or will that become a distributed function, following the lead of several other technologies?…

 

To read the full Semiconductor Engineering article by Brian Bailey, click here.


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Related Resources

There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.

On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.

Publicly available Imperas documents:

NSITEXE’s RISC-V Success Using ImperasDV and Cadence

Using OVP Fast Processor Models with OVPsim and other simulators

ARM TrustZone Platform Modeling Application Note

Comments

  • Shubhodeep Roy Choudhury, Managing Director & Co-founder

    Valtrix Systems

    Ideally any test should provide a clear pass or fail indication. In the case of RISC-V processor DV this is achieved with a comparison against a quality reference model.

    STING helps generate portable, architecturally correct and self-checking tests targeted at the corner-case scenarios by automating the comparison of the DUT against the Imperas reference model results.

  • Dr. Luciano Ost

    Embedded Systems and Communications Research Group, University of Leicester

    The lack of electronic design automation (EDA) tools combining model flexibility, and fast and accurate evaluation of performance, power, and reliability is one of the major challenges currently faced by embedded researchers. Even expensive, commercially available tools don't often meet modeling and simulation needs for emerging technologies.The description of processors – i.e., register or gate-level – is rarely available to universities, and commercial licenses are quite expensive. Having free tools with different state-of-the-art processor models allows the exploration of new system architectures.