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Imperas in the News

Imperas code morphing simulation technology, virtual platforms and tools used by lead customers for early software development and high-level architectural exploration

Andes Technology Corp

Oxford, United Kingdom, December 4th, 2019 — Imperas Software Ltd., the leader in virtual platforms and high-performance software simulation, today announced with Andes Technology Corporation, the close collaboration with lead customers for the latest…

While many companies do have verification plans, demands on those plans are changing faster than most companies can evolve.

semiengineering.com

Verification plans are rapidly evolving from mechanisms to track verification progress into multi-faceted coordination vehicles for several teams with disparate goals, using complex resource management spread across multiple abstractions and tools.

New system demands from industries such as automotive are forcing tighter integration of those plans with requirements management and product lifecycle development. As a result, today’s verification plan must encapsulate the…

Emphasis on flexibility, time to market and heterogeneity requires more processing options.

semiengineering.com

Open instruction set architectures are starting to gain a foothold, often in combination with other processors, as chipmakers begin to add more specialized compute elements and more flexibility into their designs.

There are a number of these open ISAs available today, including Power, MIPS, and RISC-V, and there are a number of permutations and tools available for sale based on those architectures. What has opened the door to making these more acceptable in designs is that one or more of these…

semiengineering.com

Complex chips require a multitude of verification platforms working in sync, and that’s where the challenges begin.

Types of Hybrid configurations

From mobile to networking to AI applications, system complexity shows no sign of slowing. These designs, which may contain multiple billion gates, must be validated, verified and tested, and it’s no longer possible to just throw the…

There may be a second chance for co-design, but the same barriers also may get in the way.

semiengineering.com

The core concepts in hardware-software co-design are getting another look, nearly two decades after this approach was first introduced and failed to catch on.

What’s different this time around is the growing complexity and an emphasis on architectural improvements, as well as device scaling, particularly for AI/ML applications. Software is a critical component, and the more tightly integrated the software, the better the power and performance. Software also adds an element of flexibility, which is…

semiengineering.com

Calling an open-source processor free isn’t quite accurate.

The RISC-V Foundation               MIPS Open

 

Open source processors are rapidly gaining mindshare, fueled in part by early successes of RISC-V, but that interest frequently is accompanied by misinformation based on wishful…

Imperas and Metrics joining CHIPS Alliance to help drive the verification of RISC-V Open ISA implementations

SAN FRANCISCO – June 18, 2019 CHIPS Alliance, the leading consortium advancing common, open hardware for interfaces, processors and systems, today announced Imperas and Metrics are joining the organization and the Verification Working Group. Imperas is an independent provider of processor simulation technology and tools for virtual platforms and analysis tools for multicore SoC software development. Metrics leads the cloud-based solutions for SoC designers with hardware simulation for both design management flexibility and on-demand capacity. The CHIPS Alliance welcomes Imperas and Metrics among…

EETimes

 

Zurich – Over the last year or so, we’ve heard many times that ‘this is the moment for RISC-V’. So, this week, I attended the RISC-V workshop in Zurich to get an idea of where it really is at right now. The conclusion: while there is still a lot of background work to be done for RISC-V to go mainstream, the signs are that all the triggers to make it happen are now gradually being released.

The biggest challenge is that RISC-V is still perceived as a hobbyist architecture, and this makes it difficult for mainstream companies to adopt, unless it has deep…

Wave Computing

OTTAWA, Ontario and ZURICH, June 6, 2019 – The OpenHW Group, a new not-for-profit global organization aims to boost the adoption of open-source processors by providing a platform for collaboration, creating a focal point for ecosystem development, and offering open-source IP for processor cores.iew photos

Headed by Founder and CEO, Rick O'Connor, the OpenHW Group has already recruited 13 sponsor organizations and expects this to grow to 25 by the end of 2019. OpenHW Group is a member of the