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Take Five with Warren, Video interview of Simon Davidmann, Imperas
In a recent visit to SIlicon Valley, Simon Davidmann, President and CEO of Imperas, visits the studio to chat with Warren. Simon shares his passion for improving productivity in design and verification, solving problems that engineers care about, and more
To view the video interview follow this link.
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There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.
On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.
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Comments
Jérôme Quévremont, vice-chair of OpenHW Cores Task Group
Thales Research & TechnologyFollowing the success of the CV32E40P verification, riscvOVPsimCOREV was selected as a reference model for the CVA6 application cores.
The selection by Imperas of a freeware license model to support CORE-V IPs is a great move towards the adoption of OpenHW industrial-grade CORE-V processor cores by a broader community.
Hideki Sugimoto, CTO
NSITEXE, Inc., a group company of DENSO Corporation.The NSITEXE Akaria processors, developed with the use of Imperas RISC-V verification technology, are targeted to address the high-performance requirements for AI and automotive requirements with the necessary features and quality to achieve the ISO 26262 ASIL D functional safety standard, in addition to optimized and efficient processors for the next generation embedded applications.
As the NSITEXE Akaria processors are adopted across a wide range of next generation of automotive, safety critical, and embedded applications, the partnership with Imperas now also provides the dependable reference models that support developers across the entire design and development phase of an SoC project.