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Revolutionizing Embedded Software Development

Introducing Commercial Imperas Tools For RISC-V and Microsemi Platforms at the 7th RISC-V Workshop

Abstract:

At the 7th RISC-V workshop held at the Western Digital facility in Milpitas in California in November 2017, Imperas introduced its RISC-V focused tools and also RISC-V based Extendable Platform Kit virtual platform as part of the Microsemi Mi-V ecosystem. The tools discussed included the Imperas Processor Developer Suite. The EPK includes RISC-V Microsemi components and cores that run the FreeRTOS operating system. Here are the presented slides.

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Comments

  • Enno Wein, Founder and CEO

    ProximusDA

    OVP Fast Processor Models are an essential foundation to system level design, helping to unleash innovation in this area. By providing free models and associated virtual prototyping infrastructure, OVP enables the ecosystem to focus on advanced technologies and solutions.

  • Dr. Charlie Su, President and CTO

    Andes Technology Corp.

    RISC-V represents the potential for innovation, and it is the implementation of great ideas that are really generating exceptional results.

    To unlock such potentials, Andes provides the AndeSysC™ environment, an extensible and near-cycle accurate SystemC model library for all AndesCore®. SoC architects can use it to construct a SystemC based virtual platform for performance evaluation of critical code segment and hardware/software co-optimization. ACE technology helps users implement custom functions and instructions, and it directly connects to the AndeSysC™ environment. Now with the close integration with the Imperas fast reference models and tools, design teams can embark on architecture exploration with complete application software for the next generation of domain specific devices with a seamless path to ACE implementation.