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Revolutionizing Embedded Software Development

Imperas and UltraSoC Presentation on Common Software Development Environment for RISC-V at Barcelona Workshop May 2018

Abstract:

At the 8th RISC-V Workshop that was held in Barcelona in May 2018, Imperas and UltraSoC presented their co-operative work on a common debug environment for use with simulation and hardware. These are the slides presented.

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Comments

  • Nobuyuki Ueyama, President

    eSOL TRINITY Co., Ltd.

    RISC-V is enabling a new wave of design innovation, and successful projects depend on quality processor IP and dependable design platforms that offer architecture exploration and early software development.

    Having supported the NSITEXE team on the extensive internal RISC-V processor verification, as well as on the virtual platform development task for multiple projects, the support team at eSOL TRINITY is now able to assist developers as they build the next generation of SoC designs using the Imperas tools and reference models for the NSITEXE Akaria processors.

  • Miroslav Popovic

    Professor, University of Novi Sad, Serbia

    Using Imperas and OVP in my course on Real-Time System Programming is an immense benefit. Embedded software development is a growing need worldwide, and advanced methodologies such as Imperas delivers are required for accelerated coding and quality.