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All Imperas News

Mind-boggling number of options emerge, but which is best often isn’t clear.

Semiconductor Engineering

 

The guideposts for designing chips are disappearing or becoming less relevant. While engineers today have many more options for customizing a design, they have little direction about what works best for specific applications or what the return on investment will be for those efforts.
For chip architects, this is proving to be an embarrassment of riches. However, that design freedom comes with huge…

Companies that invest in their employees’ education often get rewarded with more productive and happier workers.

Semiconductor Engineering

 

Continuous education is essential for engineers, but many companies don’t recognize the value or they are unwilling to provide the necessary resources.
This should be a line of questioning before every new hire makes the decision about where they want to work, because it not only affects their future career, but also impacts the value they can provide…

Demand for faster processing with increasingly diverse applications is prompting very different compute models.

Semiconductor Engineering

 

Data centers are undergoing a fundamental change, shifting from standard processing models to more data-centric approaches based upon customized hardware, less movement of data, and more pooling of resources.
Driven by a flood of web searches, Bitcoin mining, video streaming, data centers are in a race to provide the most efficient and fastest processing possible.…

The design freedoms of RISC-V offer developers flexibility for innovation – now processor IP verification quality is also a flexible option.

The Lost Art of Processor Verification

 

The RISC-V open standard ISA (Instruction Set Architecture) offers developers the opportunity to configure the features and functions of a custom processor to uniquely address their target end application needs and requirements. RISC-V has a modular structure with many standard instruction extensions for…

Imperas simulation technology and reference model available for free, including test suites for basic processor hardware verification and compliance testing.

riscvOVPsimPlus for RISC-V P (Packed SIMD/DSP) Extension

Oxford, UK – July 19th, 2021 – Imperas Software Ltd., the leader in RISC-V processor verification technology, announces the latest updates to riscvOVPsimPlus with support for the near ratified P extension and architectural validation test suites.…

Imperas simulation technology and RISC-V reference models updated to cover the RISC-V P Extension for SoC architecture exploration and early software development.

 

Andes certifies Imperas RISC-V Reference Models

Oxford, UK – July 12th, 2021 – Imperas Software Ltd., the leader in virtual platforms and high-performance software simulation, today announced that Andes Technology Corp., a leading supplier of performance-efficient and extensible 32/64-bit RISC-V CPU cores and a Founding Premier member of the RISC-V International…

Time spent in debug is unpredictable. It consumes a large portion of the development cycle and can disrupt schedules, but good practices can minimize it.

Semiconductor Engineering

 

Debug often has been labeled the curse of management and schedules. It is considered unpredictable and often can happen close to the end of the development cycle, or even after – leading to frantic attempts at work-arounds. And the problem is growing…

 

To read the full Semiconductor Engineering …

Imperas simulation technology and RISC-V reference models now available pre-integrated within Valtrix STING for advanced RISC-V Processor Verification.

Imperas and Valtrix expand partnership for RISC-V Verification

Oxford, UK – June 30th, 2021 – Imperas Software Ltd., the leader in RISC-V processor verification technology, today announced a multi-year distribution and support agreement with Valtrix Systems, provider of design verification products for building functionally correct CPU and system-on…

SiFive qualifies models that are based on Imperas proprietary simulation technology — now available for SoC architecture exploration and early software development.

SiFive qualifies Imperas reference models for RISC-V

Oxford, UK – June 29th, 2021 – Imperas Software Ltd.,the leader in virtual platforms and high-performance software simulation, today announced that SiFive, Inc., the industry leader in RISC-V processors and silicon solutions, has qualified the Imperas models for the…