x

Revolutionizing Embedded Software Development

Imperas is now a part of Synopsys

Simon Davidmann: EDAC must evolve on multiple fronts

EDAC must become an industry organization that looks after all of the companies within the circle of technologies involved in electronic product design

Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com. In October Peggy interviewed Simon on his views for an article on EDACafe.

Simon Davidmann, Imperas CEO, has been thinking about the EDA industry for a while, and the consortium that represents it. And like a lot of observers, he thinks change is in the air. In previous blogs, I myself have predicted that EDAC will evolve to offer better representation to IP providers, but Davidmann believes changes in the consortium will be even more dramatic.

“When EDAC was started,” Davidmann said in a recent phone call, “it was about CAD tools. But design automation has evolved from schematic layout and simulation to a point where everything is focused on really big designs. Yes, IP is a"...

Follow the link to read the full article.

##

Related Resources

There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.

On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.

Publicly available Imperas documents:

ARM TrustZone Platform Modeling Application Note

Using OVP Fast Processor Models with OVPsim and other simulators

ARM TrustZone Platform Modeling Application Note

Comments

  • Frank Poppen, Researcher

    OFFIS - Institute for Information Technology of Germany

    OVP was selected because of the ease with which models are built and the flexibility in interfacing to other tools. The availability of the ARM processor model we needed, and the open source nature of the OVP models, were also important factors.

  • Hideki Sugimoto, CTO

    NSITEXE, Inc., a group company of DENSO Corporation

    The NSITEXE Akaria processors, developed with the use of Imperas RISC-V verification technology and the leading-edge SystemVerilog simulator and debug tools from Cadence, are targeted to address the high-performance requirements for AI and automotive requirements. The Akaria processors include the necessary features and quality to achieve the ISO 26262 ASIL D functional safety standard, in addition to being optimized and efficient processors for the next-generation embedded application.

    As the NSITEXE Akaria processors are adopted across a wide range of next-generation automotive, safety-critical, and embedded applications, the verification methodology with the support from Imperas and Cadence has been invaluable in achieving our quality goals and on-time development schedule.