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Open standard for RISC-V verification is announced at DVCon

At this year’s (virtual) functional design and verification conference, DVCon US 2022, the RISC-V Verification Interface (RVVI) was announced.

Electronics Weekly

At this year’s (virtual) functional design and verification conference, DVCon US 2022, the RISC-V Verification Interface (RVVI) was announced by Imperas Software. The interface [specification] is available at github. The draft open standard defines “a number of interfaces required to bring together several of the subsystems required for RISC-V processor design verification”. Components based on the open standard can be re-used across design teams and even across different companies, …

 

To read the Electronics Weekly article by Caroline Hayes, click here.


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Related Resources

There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.

On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.

Publicly available Imperas documents:

RISC-V Custom Instruction Flow Application Note

NSITEXE’s RISC-V Success Using ImperasDV and Cadence

RISC-V Processor Verification: ImperasDV with Synopsys VCS and Verdi Application Note

Comments

  • Bill McSpadden, Principal VLSI Verification Engineer

    Seagate Technology

    The Imperas Golden RISC-V Reference Model helped us find many bugs in our cores.

    However, the RISC-V architectural tests yielded no bugs, which is expected since the architectural tests are a subset of full verification.

  • Allen Baum, Chair of the RISC-V International Architecture Test SIG

    Esperanto Technologies, Inc.

    A key part of the RISC-V privilege specification that is fundamental for OS and application security is the PMP feature.

    Enabling its correct operation is essential for security applications, and the Imperas PMP test suites are a valuable contribution to the RISC-V compatibility and verification community.