At each new process node, gates are free. That opens the door to a lot more IP blocks, and a lot of new challenges.
Driven by each successive generation of semiconductor manufacturing technology, complexity has reached dizzying levels. Every part of the design, verification and manufacturing is more complicated and intense the more transistors are able to be packed onto a die. For these reasons, the entire system must be taken into consideration as a whole…..
To read the article by Ann Mutschler, click here.