x

Revolutionizing Embedded Software Development

Imperas release of Imagination Technologies MIPS Warrior IP core models - Embedded Computing Design - Rich Nass

Comments on Imperas Software, Green Hills Software announcments about how their support with models and tools boost Imagaination's MIPS architecture and move its ecosystem forward.

Follow the link to read the full article.

 

##

Related Resources

There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.

On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.

Publicly available Imperas documents:

RISC-V Custom Instruction Flow Application Note

Using OVP Fast Processor Models with OVPsim and other simulators

ARM TrustZone Platform Modeling Application Note

Comments

  • Jingliang (Leo) Wang, Co-chair of the OpenHW Group Verification Task Group

    Futurewei Technologies

    The UVM SystemVerilog testbenches of the OpenHW Verification Task Group, which are publicly available, are well implemented to effectively support multiple RISC-V based 64-bit and 32-bit CPU cores.  The common verification methodology shared by these testbenches does a good job in identifying issues and supporting the analysis and resolution.

    The Imperas reference model incapsulated within the testbenches is a key component to enable the step-and-compare interactive checking approach for efficient error resolution.

  • Art Swift, President

    prpl Foundation

    We are all aware of the importance of security, especially in the IoT. Imperas, with their participation in the prpl Foundation, support for the prpl platform, and their high-performance releases, are making important contributions in this arena.