Imperas to present an overview of RISC-V processor verification for open-source IP cores
Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced their participation at the WISH (Women in Semiconductor Hardware) Conference. GSA (Global Semiconductor Alliance) has established its Women’s Leadership Initiative (WLI) and the technical conference WISH. The annual event features technical presentations on the latest updates for the design and development of semiconductor ICs and SoCs.
‘Open-source is a great price, but verification adds the real value’
• Speaker: Manny Wright – Imperas Software
• When: September 13, 2022 10:50am – Santa Clara Convention Center, California
RISC-V adopters are exploring processor design freedoms enabled by the open standard ISA. These design freedoms are also driving the interest in open-source hardware. The OpenHW RISC-V cores are open-source, free is a great price but the real value is in the verification to industrial grade standards for commercial adoption. This talk with highlight the innovations in RISC-V processor verification that complements the design freedoms of the open standard ISA.
About the WISH Conference
For more information see this link.
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