Imperas Case Study US Air Force
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There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.
On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.
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Don Smith, Vice President Engineering
MIPS, Inc.At MIPS we are experienced in bringing advanced computing technology, such as hardware multi-threading, to market as applications-class processors.
As part of the strategic move to RISC-V, we fully appreciate the needs, implications and requirements for a high-quality verification solution. The Imperas Reference Model enables lock-step-compare with asynchronous events which is the foundation of our SystemVerilog testbench and verification methodology.
Dr. Luca Benini, chair of digital circuits and systems and one of the originators of the RISC-V PULP project
ETH ZurichRISC-V has made the successful transition from an academic project to achieve commercial adoption. We see a universal need for quality and design assurance that can be supported by riscvOVPsim across all projects as PULP RI5CY cores are increasingly implemented in commercial SoC development.