High-quality and efficient verification requires a focus on details.
Verification is undergoing fundamental change as chips become increasingly complex, heterogeneous, and integrated into larger systems.
Tools, methodologies, and the mindset of verification engineers themselves are all shifting to adapt to these new designs, although with so many moving pieces this isn’t always so easy to comprehend. Ferreting out bugs in a design now requires a multi-faceted and more holistic approach, particularly with AI/ML, safety-critical designs, and the proliferation of multi-chip packages. As a result, verification engineers now require a deeper understanding not only of problems that are found but also of those that aren’t found, shifting the verification task both left and right….
To read the full Semiconductor Engineering article by Ann Steffora Mutschler, click here.