Technologies must evolve to keep up with changing demands, and emulation is no exception.
Emulation is now the cornerstone of verification for advanced chip designs, but how emulation will evolve to meet future demands involving increasingly dense, complex, and heterogeneous architectures isn’t entirely clear.
EDA companies have been investing heavily in emulation, increasing capacity, boosting performance, and adding new capabilities. Now the big question is how else they can leverage this technology as design needs shift. Design has remained at the register transfer level (RTL) for 30 years, and simulator performance stalled out about 20 years ago. That gap increasingly has been filled by emulators, whose performance is almost independent of design size, thanks to technology advances that keep pace with increasing design sizes.
“As a verification industry, we keep doing what we used to do,” says Simon Davidmann, CEO for Imperas Software. “Things scale up, computers get more powerful, we add more memory, and then at some point, something breaks. We can’t keep doing it that way. We have to move to the next level of whatever it is…
To read the full Semiconductor Engineering article by Brian Bailey, click here.