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NSITEXE Qualifies Imperas RISC-V Reference Models for Akaria Processors NS72A, NS72VA, and NS31A

These latest models support the NS family of standard processors in safety critical and next-generation embedded systems, for developers using Imperas and other leading EDA tools

NSITEXE Qualifies Imperas RISC-V Reference Models for Aquaria Processors

Oxford, United Kingdom – December 13th, 2022 – Imperas Software Ltd.,the leader in RISC-V simulation solutions, today announced that NSITEXE, Inc., a group company of the DENSO Corporation that develops processor IP for functional safety and next-generation embedded systems, has certified the Imperas RISC-V reference models for the NSITEXE Akaria processors. Simulation models are an essential starting point for SoC architecture exploration and early software development, and due to the impact on design decisions and schedule the quality and dependability of reference models are an important component for developers in achieving the overall time-to-market goals.

NSITEXE Akaria processors
The NSITEXE Akaria processors cover the high-end performance requirements with RVV1.0 compliant vector processor and multi-threaded scalar processor for a wide range of automotive and industrial applications. The portfolio of Akaria processors also supports next generation embedded applications with optimized features for Functional Safety (FuSa), low power and performance efficiency.

  • The Akaria NS72VA with FuSa supports the RV64GCV instruction set and is an application CPU supporting a variety of operating systems, while maintaining Akaria’s functional safety features. Multi-core processing and the optional RISC-V Vector Extension v 1.0 Vector Processor Unit enable multi-tasking and data-parallel high-performance computing.
  • The Akaria NS31A with FuSa is a general-purpose CPU with a single-issue, in-order 4-stage pipeline that uses a 32bit RISC-V ISA (RV32IMAF). It supports ISO 26262 ASIL D functional safety mechanism required for automotive applications, and also supports the privileged mode that is required for AUTOSAR Platforms. NS31A is a highly efficient general-purpose CPU that is targeted for controlling various embedded systems, including automotive applications.

Imperas models
The Imperas simulation technology is complemented with a rich library of over 350 processor and virtual platforms, plus over 250 peripheral components all available from for free under an Apache 2.0 open-source license. These library elements can be configured and modified as necessary to model the target platform requirements. The Imperas commercial simulation technology and products are based on the freely available open-standard public OVP application programming interfaces (APIs). Imperas Fixed Platform Kits (FPK) allow for the delivery of pre-configured platform models as a binary installation within friction-free installation without the need for any license management or complex installation set-up. For more information visit

Virtual Platform use case
The Imperas model of the Akaria NS31A with FuSa was used with the Imperas virtual platform (software simulation) products as a foundation for the development of a RISC-V based security IP block. The resulting Imperas virtual platform and Fixed Platform Kit (FPK) was distributed to NSITEXE partners to support software development activities. In addition, the Imperas model of the NS72 was used with Imperas virtual platform tools for software development, and also for performance estimation.  

“The NSITEXE Akaria processors, developed with the use of Imperas RISC-V verification technology, are targeted to address the high-performance requirements for AI and automotive requirements with the necessary features and quality to achieve the ISO 26262 ASIL D functional safety standard, in addition to optimized and efficient processors for the next generation embedded applications,” said Hideki Sugimoto, CTO of NSITEXE, Inc., a group company of DENSO Corporation. “As the NSITEXE Akaria processors are adopted across a wide range of next generation of automotive, safety critical, and embedded applications, the partnership with Imperas now also provides the dependable reference models that support developers across the entire design and development phase of an SoC project.”

“RISC-V is enabling a new wave of design innovation, and successful projects depend on quality processor IP and dependable design platforms that offer architecture exploration and early software development,” said Nobuyuki Ueyama, President of eSOL TRINITY Co., Ltd. “Having supported the NSITEXE team on the extensive internal RISC-V processor verification, as well as on the virtual platform development task for multiple projects, the support team at eSOL TRINITY is now able to assist developers as they build the next generation of SoC designs using the Imperas tools and reference models for the NSITEXE Akaria processors.”

“As an open standard ISA, RISC-V is enabling new design freedoms, not just at the processor hardware level but throughout the entire system of hardware and software flexibility,” said Simon Davidmann, CEO at Imperas Software Ltd. “The Imperas RISC-V verification technology and solutions assisted the team at NSITEXE during the functional verification phase of development and test, and now we are proud to see the Imperas reference models assist SoC developers and end users with Imperas RISC-V reference models and Fixed Platform Kits (FPK).”


The Imperas reference models for NSITEXE Akaria NS72A, NS72VA, and NS31A are available now to lead customers and partners. Models for the other members of the NSITEXE Akaria processor portfolio are available on request.

Imperas reference models can be integrated with most industry-standard software IDEs and debuggers, and are available from Imperas and approved Imperas EDA distribution partners.

RISC-V Summit 2022
Imperas is proud to be a contributing Diamond sponsor for the fifth annual RISC-V Summit, December 12-15 2022 in San Jose, California. Imperas will showcase solutions for RISC-V processor verification, custom instruction design flows, and software development, including a keynote on RISC-V Processor verification plus many other activities. For more information, please visit RISC-V Summit 2022.


About Imperas

Imperas is the leading provider of RISC-V processor models, hardware design verification solutions, and virtual prototypes for software simulation. Imperas, along with Open Virtual Platforms (OVP), promotes open-source model availability for a spectrum of processors, IP vendors, CPU architectures, system IP and reference platform models of processors and systems ranging from simple single core bare metal platforms to full heterogeneous multicore systems booting SMP Linux. All models are available from Imperas at and the Open Virtual Platforms (OVP) website at

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