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Revolutionizing Embedded Software Development

Imperas is now a part of Synopsys

Is Programmable Overhead Worth The Cost?

How much do we pay for a system to be programmable? It depends upon who you ask.

Semiconductor Engineering

 

Programmability has fueled the growth of most semiconductor products, but how much does it actually cost? And is that cost worth it?
The answer is more complicated than a simple efficiency formula. It can vary by application, by maturity of technology in a particular market, and in the context of much larger systems. What’s considered important for one design may be very different for another…

 

To read the full Semiconductor Engineering article by Brian Bailey, click here.


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Related Resources

There are many Imperas documents available. Some of them are accessed only from the Imperas User site and are available only to Imperas customers under license.

On the OVPworld website there are many documents that introduce the various APIs and technologies developed by Imperas and made available as part of Open Virtual Platforms. Click here for the OVPworld documentation list.

Publicly available Imperas documents:

Using OVP Fast Processor Models with OVPsim and other simulators

RISC-V Processor Verification: ImperasDV with Synopsys VCS and Verdi Application Note

NSITEXE’s RISC-V Success Using ImperasDV and Cadence

Comments

  • Chuanhua Chang, Chair of RISC-V International P Extension Task Group

    Andes Technology Corp.

    Flexibility within a framework of compatibility is the essential foundation of the RISC-V ISA.

    The RISC-V P extension defines a rich set of integer SIMD/DSP instructions operating on existing integer registers to support complex data processing within the constraints of real-time applications. However, the hardware specification is just the start - adoption and success depend on the software ecosystem, which is supported with the reference models and test suites from Imperas.

  • Róisín O’Keeffe, VP Global Business Development

    Ashling Microsystems

    Ashling takes great care in the integration and combinations of technologies for our tools to support software developers. The Imperas riscvOVPsimCOREV reference simulator provides the foundational reference that CORE-V IDE’s can be based on.