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QuantumLeap parallel simulation accelerator enables virtual platform performance of greater than 16 billion instructions per second, the fastest commercial solution available today

Oxford, United Kingdom, February 4th, 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, has added support for models of Imagination Technologies’ MIPS processors to QuantumLeap™, a parallel simulation performance accelerator.

QuantumLeap leverages Imperas’ new synchronization algorithm to provide the fastest virtual platform software execution speed available today on standard, multi-core Personal Computer (PC) host machines.  The Imperas technology - simulation plus processor core…

Parallel synchronization technology augments existing high-performance simulator to accelerate virtual platforms beyond 16,000 MIPS, the fastest commercial solution available today

Oxford, United Kingdom, October 22nd, 2013—Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, has released QuantumLeap™, a parallel simulation performance accelerator. QuantumLeap leverages a new synchronization algorithm to provide the fastest virtual platform software execution speed available today on standard, multi-core Personal Computer (PC) host machines.

The execution performance of this new technology has been measured on average at 15 times faster than the nearest commercial…

Open source simulation model enables Altera customers to more easily validate and debug Nios II embedded software

San Jose, Calif., October 22nd, 2013—Imperas Software Ltd. (www.imperas.com), founder of the Open Virtual Platforms™ (OVP™) consortium, today announced the availability of the Altera Nios II embedded processor OVP model. Jointly developed by Imperas and Altera, this open source model will enable a high-performance development environment for Nios II embedded software.

The OVP Fast Processor Model of the Nios II may be configured at start-up to match the intended behavior of the actual FPGA component, but will execute significantly faster than real-time. This allows embedded software to be tested…

Kit Includes Modeling Application Note and Four Open Source, Executable Platform Examples Based Upon OVP™ ARM Cortex™ Processor Models With TrustZone Technology

OXFORD, United Kingdom, October 8th, 2013 – Imperas Software Ltd. (www.Imperas.com), a pioneer of advanced embedded software development systems using virtual platforms, today made available a System Modeling Kit designed to simplify the creation of high-performance virtual platforms that incorporate the ARM TrustZone technology.

The System Modeling Kit provides four open source virtual platform reference models, together with an application note and video, to demonstrate best modeling practices for systems based on TrustZone. The kit is designed to accelerate…

Open Virtual Platforms (OVP™) Fast Processor Model Supports the PowerPC 440™, PowerPC 460™, PowerPC 470™ and PowerPC 476™ Variants of the Popular Processor

OXFORD, United Kingdom, September 26, 2013 – Imperas Software, Ltd. has today released its latest OVP Fast Processor Model for the POWER.org architecture. The new Imperas model of the IBM PowerPC 4xx range supports the PowerPC 440, PowerPC 460, PowerPC 470 and PowerPC 476 variants. The model is available as part of the OVP library, allowing for free access to OVP users.

The IBM PowerPC 4xx processor range is widely utilized by many companies today in a range of applications including automotive, compute servers, military and aerospace, wired and wireless communications, and home entertainment.

At the June 3, 2013 North American SystemC User Group meeting as part of the Design Automation Conference 2013 in Austin Texas, Victoria (Vicki) Mitchell of Altera presented a paper titled: Embedded Software Dynamic Analysis: A New Life for the Virtual Platform.

The presentation introduces the Software part of HW/SW co-design, with the issues of Code Safety and Security being addressed and how Dynamic Analysis using simulation and virtual platforms can address them. It continues with Software Analysis by using a platform modeled with OVP and using the Imperas tools shows examples of how bugs were…

At the recent DAC in Jun 2013 in Austin Texas, Vicki Mitchell of Altera presented about the use of Imperas tools to find bugs in Operating Systems and RTOS. Ther is more information here.

Miyashita-san of Fuji Xerox follows developments regarding OVP and Imperas and gives an update in his blog here: http://blogs.yahoo.co.jp/verification_engineer/68146679.html

 

 

 

Imperas recently announced its new generation of Software Development Tools that utilize Virtual Platforms.

Nikkei Electronics in Japan have written an article in Japanese about this announcement - to read the article please follow this link: http://techon.nikkeibp.co.jp/article/NEWS/20130822/298823/

 

Peter Clarke      EETimes     May 20th, 2013

LONDON – Imperas Software Ltd., a vendor of virtual prototyping, high-speed instruction-accurate modeling and simulation software, is offering its second generation of multicore software development tools to sit on top of its platforms.

The Imperas product offering is divided into the Developer range of tools and the more fully-featured Multicore Software Development Kit (M*SDK). The software debug is based on so-called ToolMorphing technology in which debug tools and hardware models are merged in the same execution stream and compiled in a just-in-time manner. This produces faster than real-time execution performance improves verification throughput, Imperas claims.