Embedded World 2023 Conference Presentation:
The open standard specification of RISC-V provides the foundation for new approaches to processor design that can be adaptable to address domain specific requirements. To address more complex requirements one approach is to develop multicore processing units than can be optimized for the target workloads. This case study will look at multiprocessor subsystems for AI/ML algorithms for both audio processing and general DSP applications. The design and development of processor IP and multiprocessor systems concurrently offers opportunities to optimize both the hardware and software in parallel, but also requires a new software centric approach to hardware design.
This case study highlights the challenges of verification of custom processor features, development of the multiprocessor communications infrastructure, and software development using full workload analysis to optimize the hardware configurations.
To start the initial software concept development a software simulation approach is used (virtual platform). The starting point is a single CPU model, which is also used for hardware design verification, assembled in a SystemC environment for basic software bring up.
This paper includes a review of the techniques used for verification of the initial RISC-V processor, further extension to the processor subsystem, and multicore software development for real-time audio AI applications.
Speaker: Larry Lapides – Imperas Software
Co-authors: Pascal Gouedo – Dolphin Design
Damien Le Bars – Dolphin Design
Olivier Montfort – Dolphin Design
Mike Thompson – OpenHW Group
Kevin McDermott – Imperas Software
Lee Moore – Imperas Software
Aimee Sutton – Imperas Software