Imperas participating at the online virtual event highlighting the latest developments for RISC-V Verification for the open source CORE-V processor IP family.
Imperas Software Ltd., the leader in RISC-V processor verification technology, today announced their participation at the OpenHW Day as part of RISC-V Week 2021. OpenHW Day is an online virtual event featuring presentations and panels on the latest developments on the CORE-V IP Cores, running projects and supporting infrastructure. Imperas will present updates and demos for the RISC-V verification reference model, software simulation, plus join the panel discussions for interactive Q&A with the on-line attendees.
The panel discussion on OpenHW with key participants based in Europe including Simon Davidmann of Imperas
OpenHW Software Task Group Projects:
The Imperas talk will feature updates on Software Models and ISS (Instruction Set Simulator) for CORE-V
OpenHW CORE-V Verif:
This talk will also feature a hands-on demo of Imperas RISC-V verification reference model and SystemVerilog test bench and supporting infrastructure
During the live sessions and breaks, Imperas staff will be available for interactive Q&A with attendees throughout the event.
Free! Registration is free for the 2021 RISC-V Week including the OpenHW Day, see more details at https://open-src-soc.org
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