Imperas presentation on "Optimizing RISC-V custom instructions with software driven analysis and profiling" by Kevin McDermott, VP of Marketing at Imperas Software, as part of a Webinar together with Andes Technology and UltraSoC Technologies on September 29 2020.
This Webinar is on the flexibility of RISC-V in SoC designs for 5G, AI, AR/VR, and IoT with optimized extensions and custom instructions. Starting with architectural exploration to profile applications and identify candidate instructions, then details of the design flow to implement and verify new extensions, and use on-chip instrumentation for debug, plus analysis and lifecycle management aspects.
RISC-V is opening up new design freedoms with optimized solutions beyond the boundary of standard processor core roadmaps. Domain specific optimizations offer just the right balance between hardware efficiency and software flexibility.
Start exploring your next project with the flexibility of RISC-V and optimized extensions.
Includes a live Q&A session after the presentations.
This webinar can be viewed on this link. (Requires registration.)