For a demo of how easy it is to download the OVP simulator and models, and a quick walk through downloading and running the applications running on a RISC-V Fast Processor Model, please watch this video.
CTO Bluespec Inc. and Chair of RISC-V Formal Task Group
The RISC-V ISA Formal Spec Task Group will produce a Formal Specification for the RISC-V ISA. We see the introduction of riscvOVPsim as an excellent reference platform to test and verify with.
Charlie Hong-Men Su, CTO and Senior VP
The Imperas virtual platform solutions for software development, debug and test, along with their open-source models, comprise an excellent methodology for development of embedded software for SoCs based on V5 AndesCore N25 and NX25 RISC-V processors.