RISC-V is more than an ISA specification, it is a framework of flexibility; the real value is in the extensions and options available for processor core implementations.
The RISC-V P extension within the Andes cores addresses the key real-time requirements in SIMD/DSP computations for new markets in audio/speech, IoT, tinyML and edge devices. Together with the Andes certified Imperas reference models, SoC developers can explore the next generation domain-specific solutions.
Anders Holmberg, General Manager Embedded Development Tools
IAR Systems
64bit is not just about the word length or address space of a processor.
The Arm v8 cores offer embedded developers a step change in performance and capability, this potential is now complemented with high performance simulation software. Software developers can migrate to the latest devices with confidence based on the IAR Systems development tools and Imperas simulator technology.