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Imperas at virtual Embedded World, March 1-5 2021

Imperas participating at the online virtual digital event with the latest updates for RISC-V Verification and SoC Architecture Exploration for AI applications with virtual platforms.

Embedded World 2021

Imperas Software Ltd., the leader in RISC-V processor verification technology, today announced their participation at Embedded World 2021, including a technical paper with a live presentation at the online conference, plus a virtual booth within the RISC V Pavilion, featuring a roundtable discussion, presentations, live demonstrations, and Q&A with the Imperas team. 


Imperas Live presentation at the EW2021 Technical Conference: 
Presentation: ‘Software driven SoC Architectural Exploration for AI and ML accelerators with RISC-V'
•    Speaker:    Simon Davidmann – Imperas Software
•    When:         Live virtual talk on Tuesday, March 2nd at 4:45pm CET
SoC developers and system designers are looking at hardware acceleration options for AI and Machine Learning applications moving from cloud-based algorithms to dedicated hardware. Since the algorithms are already configured for multicore support the tradeoffs become focused on the structure of processor arrays and the optimum performance requirements at each node. In addition to the flexibility offered by the open standard ISA of RISC-V to configure the core features to match the compute requirement, RISC-V offers the options to add custom extensions and instructions that allows a greater degree of system optimization. New extensions can be targeted at the application workload or as dedicated communication channels between the cores, nodes and/or interfaces to the NoC. This talk covers a methodology to evaluate the hardware options by enabling early system architectural exploration using software to uncover the optimum design configurations. 


Virtual Exhibit:Visit the Imperas virtual booth and see all the latest demonstrations and virtual platform technology for RISC-V Verification including custom instructions and support for the latest RISC-V specifications for Vectors and Bit Manipulation. For more information, or to set up a live 1-1 demo with the Imperas team during the virtual conference, please contact


About Embedded World 2021
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About Imperas

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