Skip to main content

Imperas Paper at TVS Testing Conference 2014 Virtual Platform Software Simulation for Enhanced Multi-core Software Verification

The presentation starts by discussing the current practises for embedded software development and explains current problems with this approach and then
explains where simulation and virtual platforms for software development fits in.

The speed of the Imperas OVP Fast Processor Models and platforms is shown and a demonstration shows Linux booting on a simulation of
the Imperas Extendable Platform Kit (EPK) of the ARM Versatile Express board running a Cortex-A15MPx4 quad core processor. The Linux boot takes just under 7 secs on
a standard laptop PC running Windows. The demonstration continues by showing an EPK of an ARM ARMv8 Cortex-A57MPx4 running benchmarks at 3,500 MIPS using the Imperas QuantumLeap
parallel simulation accelerator product. This section concludes with discussion around the fact that faster simulation of sofrware execution finds bugs sooner.

The OVP library of over 200 open source models is introduced coded using open standard OVP APIs in C. JIT code morphing simulation is introduced and there is discussion of
layering non-intrusive tools on top of fast simulation. The Imperas tools are touched on.

Case studies are presented related to OS porting, bring up and verification on an Altera Cyclone V SoC FPGA. The use of a multicore assertion checker for shared memory violation checking is shown.

There is a video recorded of this presentation and this video is available from the video links on this site. The video also includes a recorded Q&A session on the above topics.