Simon Davidmann, Imperas, hosts a personal perspective on the formation and history of SystemVerilog with the co-founders of Verilog and SystemVerilog. In 1997, Co-Design Automation Inc., was set-up by Simon Davidmann and Peter Flake, to design and implement a new language and simulator. Phil Moorby joined in 1999. The company name showed the desire to include software/hardware co-design, but there was more customer interest in hardware design and verification, and even system specification. Their original vision of Superlog (derived from Super and Verilog) was to have a single language for system specification, hardware design, hardware verification, and software development. Superlog was later renamed to SystemVerilog as it became adopted by Accellera and later became an IEEE standard.
The paper referenced in the video is available at this link on this link.