RISC-V represents the potential for innovation, and it is the implementation of great ideas that are really generating exceptional results.
To unlock such potentials, Andes provides the AndeSysC™ environment, an extensible and near-cycle accurate SystemC model library for all AndesCore®. SoC architects can use it to construct a SystemC based virtual platform for performance evaluation of critical code segment and hardware/software co-optimization. ACE technology helps users implement custom functions and instructions, and it directly connects to the AndeSysC™ environment. Now with the close integration with the Imperas fast reference models and tools, design teams can embark on architecture exploration with complete application software for the next generation of domain specific devices with a seamless path to ACE implementation.
Andrew Schmidt
University of Southern California’s Information Sciences Institute (USC/ISI)
Imperas tools and models provide us with enhanced capabilities to pursue research we could not otherwise achieve with significantly less upfront development effort. The virtual platforms allow us to rapidly explore state-of-the-art prototypes and bridges the gap between hardware and software development.