Imperas and Industry Articles

Capturing Performance - Semiconductor Engineering - Ann Steffora Mutschler

In a recent article in Semiconductor Engineering, Ann Steffora Mutschler explores examples of architectural strategies for getting the best performance out of a power budget.

Virtual platform developer Imperas Software's  tools are being used for power estimation, to enable dynamic analysis of the impact of the complete software stack - OS, firmware, applications - on the power consumption of SoCs and systems, according to CEO Simon Davidmann. "We have seen various architectures used by our customers with power constraints.  What most of these architectures have in common is heterogeneity:  using the right processor for the appropriate task."

He sees the next step in this progression of system architectures as enabling optimized sharing of...

Follow the link to read the full article.

 

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Imperas active with prpl Foundation at IMG Silicon Valley Summit

At the Imagination Technologies Silicon Valley Summit in May 2015 there was a series of presentation and discussions regarding Virtualization, Security and the prpl Foundation.

Imperas is a founding member of the prpl Foundation Security PEG (prpl Engineering Group) and is working to provide solutions to assist electronic product developers to remove risks associated with embedded software development.

Several videos were recorded regarding prpl at the IMG summit - these can be viewed on the prpl youtube channel here.

To see the comments from Simon Davidmann, Imperas CEO, click here.

 

 

 

 

 

The Hardware Vanishing Point: Someday, Will it All be Software? - Electronic Engineering Journal - Kevin Morris

"The disciplines of hardware and software engineering have always been intertwined and symbiotic - like the yin and yang of some bizarre abstract beast. Software cannot exist without hardware to execute it, of course, and most hardware today is designed in the service of software. The vast majority of systems being designed today involve a mix of both elements working together, with software steadily inheriting more and more of the complexity load.

Let’s think about that for a minute..."

Follow the link to read the full article.

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Problems Ahead For EDA - Semiconductor Engineering - Brian Bailey

At the DVCon conference in Santa Clara in April, Brian Bailey of Semiconductor Engineering hosted a round table discussion on the state of EDA and the opportunities for new startups to grow and succeed.  Imperas CEO and OVP founder, Simon Davidmann was part of the discussion.

EDA Startup Panelists

Other participants were Bill Neifert, chief technology officer at Carbon Design Systems; Randy Smith, vice president of marketing for Sonics; and Michel Courtoy, vice president of marketing and business development for Kilopass Technology.

The discussion is being reported in 3 posts by Brian. There are links to them below.

Eschew the Real World - EE Journal - Jim Turley

Recently Electronic Engineering Journal (EEJournal)'s Jim Turley wrote an interesting article on Imperas and the view that Imperas takes regarding software development.

"... Imperas thinks that programmers, as a class and as a profession, could stand to learn a few hard lessons from their colleagues over on the hardware side of the house. Specifically, the SoC and ASIC designers. Now those guys have got their stuff together. You could learn a few things from them. So what do the hardware guys do that the software people don’t? They simulate, mostly. They simulate the..."

"... The idea is that you simulate your code running on a simulated processor with simulated peripherals and simulated APIs. Everything runs on a standard x86-based PC; the more CPU cores it has, the better. Imperas’s tools will translate your ARM, MIPS, or other binaries to x86 on the fly for simulation. As part of that translation, the tools also..."

Read the full article is available on the EEJournal website here.

 

Security, MIPS VZ instructions and virtual platforms

One of the hottest topics in embedded systems today is security and safety. And one of the ways to address security and safety concerns is by using hypervisors and/or secure operating systems, and by specifically adding security into embedded software. To facilitate these techniques, Imagination Technologies added in hardware virtualization instructions – the VZ extensions – to the...

To read the blog, please visit the Imagination Blog Site.

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Imperas release of Imagination Technologies MIPS Warrior IP core models - Embedded Computing Design - Rich Nass

Comments on Imperas Software, Green Hills Software announcments about how their support with models and tools boost Imagaination's MIPS architecture and move its ecosystem forward.

Follow the link to read the full article.

 

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New models for MIPS Warrior CPUs

With the run up to the Embedded World conference and exhibition in Germany in February, Larry Lapides of Imperas contributed a guest blog for Imagination on the latest OVP Fast Processor models for the new MIPS Warrior range.

The blog talks about several items related to Imperas, OVP and Imagination's MIPS models. It also provides the outline for the Embedded World paper on accelerating simulation using multi-core host PCs and also provides links to other related topics.

To read the blog, please visit the Imagination Blog Site.

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Yikes! CoWare, VaST, Virtutech acquired in a week - changes in virtual platform space - Cooley Blog

An interesting contributed blog on the changes in the virtual platform space by John Cooley of ESNUG and DeepChip

John Cooley, though focused on the EDA simulation, synthesis, and RTL areas collected some information regarding the recent acquisitions.

There are contributions from:

  • Jay Vleeschhouwer of Ticonderoga Securities
  • Simon Davidmann of Imperas
  • Bill Neifert of Carbon
  • Brett Cline of Forte Design
  • and several annonymous contributors

To read the full article, please visit the blog on deepchip.com here

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