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Revolutionizing Embedded Software Development

Imperas is now a part of Synopsys

OpenHW CORE-V

Brief Overview

OpenHW Group is a not-for-profit, global organization driven by its members and individual contributors where hardware and software designers collaborate in the development of open-source cores, related IP, tools and software. OpenHW Group provides an infrastructure for hosting high quality open-source HW developments in line with industry best practices.

There are a range of cores, known as CORE-V with the initial one being the 32-bit CV32E40P originally known as the PULP RI5CY core (from ETH Zurich university). The CORE-V CV32E40P is a 32bit, 4-stage core that implements the RISC-V specifications for RV32IMCZifencei. The CV32E40P has been extensively verified against the Imperas OVP golden reference model of RISC-V as part of the CORE-V Verif project.

The OVP models of the CORE-V cores and platforms are available to download from OVPworld at www.OVPworld.org/ip-vendor-openhwgroup.

For software development a Free ISS is also available, riscvOVPsimCOREV can be downloaded from https://github.com/openhwgroup/riscv-ovpsim-corev.

Partner Type
Silicon and IP Providers
Website URL
OpenHW CORE-V
Weight
6

Comments

  • Dr. Charlie Su, President and CTO

    Andes Technology Corp.

    RISC-V is more than an ISA specification, it is a framework of flexibility; the real value is in the extensions and options available for processor core implementations.

    The RISC-V P extension within the Andes cores addresses the key real-time requirements in SIMD/DSP computations for new markets in audio/speech, IoT, tinyML and edge devices. Together with the Andes certified Imperas reference models, SoC developers can explore the next generation domain-specific solutions.

  • Simon Davidmann, CEO

    Imperas Software

    Processor verification is challenging, and yet critical to RISC-V adoption.

    ImperasDV is the first commercially available RISC-V processor verification solution, and the achievement of the tight integration with Cadence is key to the successful use of ImperasDV by NSITEXE.