x

Revolutionizing Embedded Software Development

Imperas is now a part of Synopsys

Cadence Tensilica

Brief Overview

Cadence's Tensilica is the leader in customizable dataplane processors IP cores. Dataplane Processor Units (DPUs) combine the best capabilities of CPUs and DSPs while delivering 10- to 100-times the performance because they can be customized using Tensilica's automated design tools to meet specific signal processing performance targets.

The OVP models of the Tensilica cores and platforms are available to download from OVPworld at www.OVPworld.org/silicon-ip-providers-cadence-tensilica.

Partner Type
Silicon and IP Providers
Website URL
Cadence Tensilica
Weight
1

Comments

  • Professor Jong Tae Kim

    Sungkyunkwan University, Seoul, South Korea - SKKU

    Imperas OVP modeling and high-level simulation platforms unify both hardware and software development for multi-core designs, and are clearly the wave of the future. Access to the University Program allows my students access to advanced technologies essential to their future endeavors.

  • Hideki Sugimoto, CTO

    NSITEXE, Inc., a group company of DENSO Corporation.

    The NSITEXE Akaria processors, developed with the use of Imperas RISC-V verification technology, are targeted to address the high-performance requirements for AI and automotive requirements with the necessary features and quality to achieve the ISO 26262 ASIL D functional safety standard, in addition to optimized and efficient processors for the next generation embedded applications.

    As the NSITEXE Akaria processors are adopted across a wide range of next generation of automotive, safety critical, and embedded applications, the partnership with Imperas now also provides the dependable reference models that support developers across the entire design and development phase of an SoC project.