All Imperas News

Will Hypervisors Protect Us?

They may not be a silver bullet, but they are a good first step when it comes to securing cars and the Internet of Things. Problems start when people believe the job is complete.

Brian Bailey is Technology Editor/EDA for Semiconductor Engineering and has written a very informative article on issues related to Hypervisors.

Another day, another car hacked and another report of a data breach. The lack of security built into electronic systems has made them a playground for the criminal world, and the industry must start becoming more responsive by adding increasingly sophisticated layers of protection. In this, the first of a two-part series, Semiconductor Engineering examines how hypervisors are entering the embedded world.

Simon Davidmann, CEO of Imperas, frames the ...

To read the article, click here.

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Silicon Without Software is Just Sand - EE Journal - Amelia Dalton

Embedded Software Development with Virtual Platforms

Shifting Left with Imperas

No one builds a chip without simulation, right? In this week’s Fish Fry, Amelia Dalton of Electronic Engineering Journal takes a closer look at the value of virtual prototypes to simulate embedded software. Simon Davidmann (CEO - Imperas) and Amelia chat about about why Simon thinks no one should design embedded software without simulation, and the benefits of using virtual platforms to develop a verification and test environment.

 

Follow the link to listen to the interview / Fish Fry....

[Amelia's Fish Fry's are one-on-one audio interviews  / podcasts with industry experts / executives about topical issues and technologies.]

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Imperas Paper at TVS DVClub 2016 Software Verification for Low Power Safety Critical Systems

<b>Abstract</b>:
<p>In November 2016, Simon Davidmann of Imperas gave a talk on how Imperas technology is being used for Timing Analysis, Power Analysis and Fault Simulation
to assist with Software Verification. Here are the slides. The talk was split into two sections.</p>
<p>The first section covers software verification for embedded systems and provides an overview of the challenges of many processors
in current embedded systems. It leads into the requirements for software verification and introduces specific embedded software development issues. It then
explains using simulation / virtual platforms and advanced tools to make embedded software development easier, quicker, and more affordable.</p>
<p>There are explanations of how simulation can be used with continuous integration and other modern software development practices.</p>
<p>The second section of the talk introduces the issues related to low power and how to use simulation to get a handle on the affects of software on low power design.
</p>
<p>Imperas is collaborating with several institutes and universities around the world and these collaborations are explored.</p>
<p>The use of Imperas Instruction Accurate simulation used for Timing Analysis, Power Analysis and Fault Simulation are discussed with examples and case studies.</p>

Fast Processor Model of Renesas RL78 CPU Released by Imperas for Open Virtual Platforms

eSOL TRINITY, Imperas Partner, Developed the RL78 Model

Oxford, United Kingdom, May 31, 2016 - Imperas™ and eSOL TRINITY announced today the release of the Open Virtual Platforms™ (OVP™) Fast Processor Model for the Renesas RL78 CPU.  Example virtual platforms have also been released, as well as support for the new model in the Imperas M*SDK™ advanced software development tools.  The model of the RL78 was developed by eSOL TRINITY, Imperas’ partner in Japan, providing technical support for Imperas customers as well as services for embedded software development. 

The processor core model and example platforms are available from the Open Virtual Platforms website, www.OVPworld.org/Renesas.  The model of the RL78 processor core, as well as models of other Renesas processors, work with the Imperas and OVP simulators, including the QuantumLeap™ parallel simulation accelerator, and have shown exceptionally fast performance of hundreds of millions of instructions per second. 

ARM Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms

ARMv8 Support From Imperas Accelerates Embedded Software Development

Oxford, United Kingdom, May 24, 2016 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, announced the availability of models and virtual platforms for the Cortex-A72 ARMv8 processors, in addition to the previously released Cortex-A53 and A57 models.  This boosts the Imperas Open Virtual Platforms™ (OVP™) processor model library to over 160 models across a spectrum of IP vendors.  Over 40 ARM cores are supported including Cortex-A, Cortex-R and Cortex-M families.

Imperas support for ARMv8 cores, such as the Cortex-A72, includes models, Extendable Platform Kits™ (EPKs™), integration with ARM DS-5 for software debug and Linaro Linux booting on the virtual platforms.

Imperas Cortex-A72 ARM processor models are available in single-core, multi-core and multi-cluster configurations enabling high performance simulations of platforms ranging from simple single cores all the way to many core systems. Imperas has also built a model of the ARM GICv3 interrupt controller, which is available with the processor core models.

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