Imperas presentation on "RISC-V Processor Verification and Extensions with Custom Instructions" by Kevin McDermott, VP of Marketing at Imperas, at the RISC-V booth during Embedded World Exhibition and Conference in Nuremberg, Germany.
Covering a range of topics on RISC-V and Imperas contributions to RISC-V with customers, adopters and the ecosystem community. Starting with a brief update and background on Imperas and the RISC-V activities, highlighting the processor models for software development and processor verification, leads on to the work within the Compliance working group including the RV32I suite announced at the RISC-V Summit in December 2019.
Plus, other verification activities based on working with customers on complex RISC-V implementations using the Imperas RISC-V Golden reference model.
The video can be viewed on the RISC-V YouTube channel here.
To see the video directly on YouTube, click here.