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Quality goals achieved with functional verification through member collaboration in the OpenHW verification working group using leading commercial tools and RVVI methodology

OpenHW CV32E40P RISC-V Verification with Imperas

Oxford, United Kingdom – June 21st, 2022 – Imperas Software Ltd., the leader in RISC-V simulation solutions, congratulates the OpenHW Group on the announcement of the CORE-V MCU Dev/Kit project based on the high-…

Design IP has played a pivotal role in the creation of today’s complex SoC, but that role keeps changing. Each change places new demands on IP suppliers.

Semiconductor Engineering


The design IP industry is developing an assortment of new options and licensing schemes that could affect everything from how semiconductor companies collaborate to how ICs are designed, packaged, and brought to market.
The IP market already has witnessed a sweeping shift from a “…

There are at least three architectural layers to processor design, each of which plays a significant role.

Semiconductor Engineering


Optimizing any system is a multi-layered problem, but when it involves a processor there are at least three levels to consider. Architects must be capable of thinking across these boundaries because the role of each of the layers must be both understood and balanced.
The first level of potential optimization is at the system…

Dependencies and partitioning can turn a simple piece of code into a complex system challenge.

Semiconductor Engineering


Embedded software, once a challenge to write, update, and optimize, is following the route of other types of software. It is abstracted, simpler to use, and much faster to write. But in some cases, it’s also much harder to get right.
From a conceptual level, the general definition of embedded software has not changed much. It’s still…

Imperas RISC-V Reference Model, Test suites and Verification IP for advanced ‘lock-step-compare’ Processor Verification including Asynchronous events and Coverage Analysis

NSITEXE and Imperas

Oxford, United Kingdom – May 24th, 2022 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that NSITEXE, Inc., a group company of the DENSO Corporation that develops and sells high-performance semiconductor IP for automotive applications, has selected

Is it possible to make a design change and not have to rerun the entire regression suite?

Semiconductor Engineering


Verification consumes more time and resources than design, and yet little headway is being made to optimize it. The reasons are complex, and there are more questions than there are answers. For example, what is the minimum verification required to gain confidence in a design change? How can you minimize the cost of finding out that the change was bad…

Most applications can be decomposed into a number of tasks, and there are many options to create better implementations of them.

Semiconductor Engineering


The optimization of one or more tasks is an important aspect of every SoC created, but with so many options now on the table it is often unclear which is best.
Just a few years ago, most people were happy to buy processors from the likes of Intel, AMD and Nvidia, and IP cores from Arm. Some even wanted the…

Integration and re-use are shifting the focus from minimal footprint to reusability and flexibility.

Semiconductor Engineering


Every good hardware or software design starts with a structured approach throughout the design cycle, but as chip architectures and applications begin focusing on specific domains and include some version of AI, that structure is becoming more difficult to define. Embedded software, which in the past was written for very narrow functions with a minimal…

Discuss real engineering challenges and solutions with electronics industry experts.

Elektor Engineering Insights

What's all this RISC-V stuff about? Stuart Cording interviews Martin Croome of GreenWaves Technologies and Simon Davidmann from Imperas Software: 

     •    What's the attraction of RISC-V?
     •    How do you integrate it?
     •    What tools are required to validate your design?


To see the full Elektor Engineering…