Brian Bailey of Semiconductor Engineering recently chaired a panel at DVCon on ESL.

Expecting the future to replicate the past always leads to surprises and when it comes to migration of abstraction for semiconductor design, the future remains unclear.

Brian interviewed several industry leaders with experience in the field and provides interesting insights into why ESL took a long time to get where it has...

Simon Davidmann, CEO of Imperas was quoted several times. For example Simon said: “Everyone is trying to do more with RTL, more design, more verification, more complexity, and they needed a better solution. The industry came up with a C++ class language (SystemC) and then tried to look at what they could do with it. What is needed is to move…

Brian Bailey of Semiconductor Engineering recently got several experts together for a round table discussion entitled:

The role of system-level verification is not the same as block-level verification and requires different ways to think about the problem.

The experts included Larry Lapides of Imperas, and also staff from Cadence, Mentor, and Breker Verification.

The discussion started with reflection on a keynote at DVCon this year that Wally Rhines, chairman and CEO of Mentor Graphics, gave. He said that if you pull together a bunch of pre-verified IP blocks, it does not change the verification problem at the system level. That sounds like a problem...

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The prpl Foundation recently published its first newsletter, as a way of extending communications with the embedded systems community. 

Imperas CEO and Open Virtual Platforms™ (OVP™) founder Simon Davidmann wrote an article for the newsletter, titled “prpl Security Group and Imperas Address IoT Security Challenges via Multi-Domain Virtualization.”  That’s quite the long title.  What was Simon saying?

To read the full article click here.

To visit prpl click…

At the recent DVCon 2016 conference in Silicon Valley, there was a lively and popular panel, with 135 attending despite the early hour.  Moderated by Brian Bailey of Semiconductor Engineering, it featured a variety of views on the role of ESL (“Electronic System Level”) in design and verification for both hardware and software.

Panelists included (from left to right below)

Patrick Sheridan, Synopsys
Raik Brinkmann, One Spin
Simon Davidmann, Imperas Software Ltd.
Bryan Bowyer, Mentor
Dave Pursley, Cadence
Adnan Hamid, Breker

Simon Davidmann of Imperas…

DATE 2016 Tutorial: Virtual Platforms in the Internet of Things (IoT) Era

OXFORD, United Kingdom, February 16, 2016 -- Imperas Software Ltd., leader in high-performance software simulation and virtual prototyping, today announced that CEO Simon Davidmann will give a tutorial at DATE (Design, Automation & Test in Europe) 2016. DATE is a leading international event for design and engineering of systems-on-chip, systems-on-board and embedded systems software. Imperas CEO Simon Davidmann will provide an introduction to virtual platforms, speaking on embedded software development, debugging, analysis, and verification…

DVCon 2016 Panel Addresses Redefining ESL

OXFORD, United Kingdom, February 9, 2016 -- Imperas Software Ltd., leader in high-performance software simulation and virtual prototyping, today announced that its CEO, Simon Davidmann, will speak on an Electronic System Level (ESL) panel at DVCon 2016. DVCon is the premier conference for discussion of the functional design and verification of electronic systems. 

This DVCon panel, “Redefining ESL”, is moderated by Brian Bailey of Semiconductor Engineering, who recently wrote an article titled, “What ESL Is Really About…

The challenge yesterday, today and tomorrow in technology is for people to move more towards the software and away from a strictly hardware-centric point of view

Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com. In December Peggy interviewed Simon Davidmann, Imperas CEO, on his views for an article on EDACafe.

Simon Davidmann and the Imperas team are based near Oxford in the UK. Nonetheless, Davidmann is a regular at Silicon Valley events throughout the year.

I spoke with Davidmann during one of his recent visits to Northern California. Per usual, the conversation was unscripted and…

Software running close to the silicon hardware still presents many challenges for designs in terms of memory footprint optimization and security vulnerability

John Blyler, Editorial Director, of JB Systems wrote an interesting article on the challenges of embedded software.

Many former semiconductor chip tool vendors no longer frequent board-level embedded software shows. Instead, these companies are returning to conferences where the software lies closer to the silicon hardware. These companies – often in the simulation space – have found they have more in common with the chip industry than the embedded systems market and are returning to shows like ARM Techcon, Renesas Devcon and the like.

It’s no secret that the EDA tool vendors and semiconductor chip…

eSOL TRINITY to Provide Technical Support and Distribute the Imperas Products to Automotive Customers

OXFORD, United Kingdom and TOKYO, Japan, November 18, 2015 -- Imperas Software Ltd., leader in high-performance software simulation and virtual prototyping, and eSOL TRINITY Co., Ltd. (TRINITY), a premier solutions provider for the design and development of embedded software, today announced that they have agreed TRINITY becomes a new technical partner and distributor for Japan. TRINITY will provide pre- and post-sales technical support, consulting, training, delivery and implementation for the complete portfolio of Imperas virtual prototyping solutions.  TRINITY is a wholly owned…