With a history based in EDA tools and background of SystemVerilog, the Imperas technology is now at the forefront of RISC-V processor verification.
This talk gives an overview of the Imperas solutions for RISC-V verification including examples of the methods used by customers and users on several projects.
Speaker: Larry Lapides – Imperas Software
The PDF of the slides used in this talk are available at this link
This DVCon presentation can be viewed on the YouTube channel for Imperas here.