Imperas Demonstrates Andes-Based RISC-V Virtual Platforms for Software Development and Testing
In order to foster stronger collaboration on RISC-V across the semiconductor industry, Andes RISC‑V CON will focus on this disruptive technology, demonstrating its benefits and identifying commercial strategies.
Imperas will present a technical paper of the advantages of early software development with virtual platforms and tools including extension for timing estimation. Following the announcement that Andes have certified the Instruction Accurate Imperas models of N25 and NX25 additional roadmap support will be highlighted as Imperas supports all the latest Andes RISC-V cores.
For more information, or to set up meetings with Imperas at Andes DevCon, please email firstname.lastname@example.org
Andes RISC-V Con Silicon Valley 2019
When: Tuesday, October 15, 2019
Where: David’s Restaurant - 5151 Stars and Stripes Drive, Santa Clara, CA
This event is free to attend but registration is required, please visit Andes RISC-V Con to register.
We look forward to seeing you at Andes RISC-V Con Silicon Valley 2019!
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