Imperas release of Imagination Technologies MIPS Warrior IP core models - Embedded Computing Design - Rich Nass
Comments on Imperas Software, Green Hills Software announcments about how their support with models and tools boost Imagaination's MIPS architecture and move its ecosystem forward.
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Comments
Dr. Luca Benini, chair of digital circuits and systems and one of the originators of the RISC-V PULP project
ETH ZurichRISC-V has made the successful transition from an academic project to achieve commercial adoption. We see a universal need for quality and design assurance that can be supported by riscvOVPsim across all projects as PULP RI5CY cores are increasingly implemented in commercial SoC development.
Bill McSpadden, Principal VLSI Verification Engineer
Seagate TechnologyThe Golden RISC-V Reference Model was used as the “go/no-go” model to determine the RTL correct behavior with any discrepancies, bugs or issues with the design, tests, specifications, or test bench.