Five Minutes With… Larry Lapides, vice president, Imperas
The best CPU architecture in the world won’t do you much good if the ecosystem falls flat.
RISC-V, the new kid on the block when it comes to instruction-set architectures (ISAs), is up against that stumbling block right now - it needs tools to not just survive, but to thrive.
In this week's Five Minutes with…discussion, Rich Nass of Embedded Computing Design and Larry Lapides, VP of Imperas talked about the present and future of the RISC-V ecosystem ...…
How to make sure different kinds of processors will work in an SoC.
Ann Steffora Mutschler of Semiconductor Engineering has written an article on the challenges of heterogenous systems.
As more types of processors are added into SoCs—CPUs, GPUs, DSPs and accelerators, each running a different OS—there is a growing challenge to make sure these compute elements interact properly with their neighbors.
Adding to the problem is this mix of processors and accelerators varies widely between different markets and applications. In mobile there are CPUs, GPUs, video and crypto processors. In automotive,…
First of two parts: How the car industry can improve reliability.
Ann Steffora Mutschler of Semiconductor Engineering has written an article on how to improve reliability in automotive.
As the amount of electronic content in a car increases, so does the number of questions about how to improve reliability of those systems.
Unlike an IoT device, which is expected last a couple of years, automotive electronics fall into a class of safety-critical devices. There are standards for verifying these devices, new test methodologies, and there is far more scrutiny about how all of this happens.
Almost everything is a tradeoff and tipping the scales is usually influenced by the end product goals. Hypervisors have a few such parameters.
Brian Bailey is Technology Editor/EDA for Semiconductor Engineering and has written an interesting article related to Hypervisors.
Hypervisors are seeing an increased level of adoption, but do they help or hinder the development and verification process? The answer may depend on your perspective.
In the hardware world, system-level integration is rapidly becoming a roadblock in the development process. While each of the pieces may be known to work separately, as soon as they are put together, the interactions between them can create a number of problems. The…
They may not be a silver bullet, but they are a good first step when it comes to securing cars and the Internet of Things. Problems start when people believe the job is complete.
Brian Bailey is Technology Editor/EDA for Semiconductor Engineering and has written a very informative article on issues related to Hypervisors.
Another day, another car hacked and another report of a data breach. The lack of security built into electronic systems has made them a playground for the criminal world, and the industry must start becoming more responsive by adding increasingly sophisticated layers of protection. In this, the first of a two-part series, Semiconductor Engineering examines how hypervisors are entering the…
Embedded Software Development with Virtual Platforms
Shifting Left with Imperas
No one builds a chip without simulation, right? In this week’s Fish Fry, Amelia Dalton of Electronic Engineering Journal takes a closer look at the value of virtual prototypes to simulate embedded software. Simon Davidmann (CEO - Imperas) and Amelia chat about about why Simon thinks no one should design embedded software without simulation, and the benefits of using virtual platforms to develop a verification and test environment.
In November 2016, Simon Davidmann of Imperas gave a talk on how Imperas technology is being used for Timing Analysis, Power Analysis and Fault Simulation
to assist with Software Verification. Here are the slides. The talk was split into two sections.
The first section covers software verification for embedded systems and provides an overview of the challenges of many processors
in current embedded systems. It leads into the requirements for software verification and introduces specific embedded software development issues. It then
explains using simulation / virtual platforms and advanced tools to make embedded software development easier, quicker, and more affordable.
There are explanations of how simulation can be…
The impact of the chip’s changing role in the system is becoming clearer.
Ann Steffora Mutschler of Semiconductor Engineering has written an interesting article on System Level design and its automation.
There are comments from Wally Rhines (chairman & CEO of Mentor), Simon Davidmann (president & CEO Imperas), Nandan Nayampally (VP marketing ARM), Nimish Modi (snr VP Cadence) and John Koeter (VP Synopsys).
Change is underway in the chip design world, creating opportunities and challenges that reach far beyond questions about whether Moore’s Law is slowing or stopping.
Never before in the history of semiconductors has design been so complex and sophisticated, and never has it touched so many lives in so many interesting ways. This is...…
Brian Bailey of Semiconductor Engineering recently chaired a panel at DVCon on ESL.
Expecting the future to replicate the past always leads to surprises and when it comes to migration of abstraction for semiconductor design, the future remains unclear.
Brian interviewed several industry leaders with experience in the field and provides interesting insights into why ESL took a long time to get where it has...
Simon Davidmann, CEO of Imperas was quoted several times. For example Simon said: “Everyone is trying to do more with RTL, more design, more verification, more complexity, and they needed a better solution. The industry came up with a C++ class language (SystemC) and then tried to look at what they could do with it. What is needed is to move…