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Simulation model certified for functional safety RISC-V core

Electronics Weekly


RISC-V intellectual property company Andes Technology has certified simulation reference models from Imperas reference for use evaluating multi-core designs featuring the functional-safety-optimised Andes Core N25F-SE. At the same time, it also certified the complete range of Andes processor IP blocks with ‘Andes Custom Extension’ (ACE) support. Such virtual references run exactly the same binary code as any resulting hardware would. “Functional safety applications demand a high standard of system and software quality which in turn has implications for the project planning, tools and methodology,” according to Imperas. “Functional safety is not just about resolving traditional software bugs and errors but also subjecting the entire platform to exceptional situations and functional stress conditions.”….

To read the full Electronics Weekly article by Steve Bush, click here.