For a demo of how easy it is to download, and a quick walk through downloading and running the applications please watch the video.
Dr. Luca Benini, chair of digital circuits and systems and one of the originators of the RISC-V PULP project
RISC-V has made the successful transition from an academic project to achieve commercial adoption. We see a universal need for quality and design assurance that can be supported by riscvOVPsim across all projects as PULP RI5CY cores are increasingly implemented in commercial SoC development.
Dr. Luciano Ost
Embedded Systems and Communications Research Group, University of Leicester
The lack of electronic design automation (EDA) tools combining model flexibility, and fast and accurate evaluation of performance, power, and reliability is one of the major challenges currently faced by embedded researchers. Even expensive, commercially available tools don't often meet modeling and simulation needs for emerging technologies.The description of processors – i.e., register or gate-level – is rarely available to universities, and commercial licenses are quite expensive. Having free tools with different state-of-the-art processor models allows the exploration of new system architectures.