We are excited to offer our customers target debug support for the Imperas golden reference models of the MIPS eVocore P8700 Multiprocessor.
This collaboration between Ashling, MIPS, and Imperas enables developers to accelerate their RISC-V software development, testing, and debugging, ultimately leading to faster time-to-market for next-generation domain-specific devices.
Nobuyuki Ueyama, President
eSOL TRINITY Co., Ltd.
RISC-V is enabling a new wave of design innovation, and successful projects depend on quality processor IP and dependable design platforms that offer architecture exploration and early software development.
Having supported the NSITEXE team on the extensive internal RISC-V processor verification, as well as on the virtual platform development task for multiple projects, the support team at eSOL TRINITY is now able to assist developers as they build the next generation of SoC designs using the Imperas tools and reference models for the NSITEXE Akaria processors.